From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1LavfB-0004nN-7A for qemu-devel@nongnu.org; Sat, 21 Feb 2009 12:29:17 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1LavfA-0004mt-DO for qemu-devel@nongnu.org; Sat, 21 Feb 2009 12:29:16 -0500 Received: from [199.232.76.173] (port=36392 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1LavfA-0004ml-77 for qemu-devel@nongnu.org; Sat, 21 Feb 2009 12:29:16 -0500 Received: from savannah.gnu.org ([199.232.41.3]:41763 helo=sv.gnu.org) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1Lavf9-0004oK-Vb for qemu-devel@nongnu.org; Sat, 21 Feb 2009 12:29:16 -0500 Received: from cvs.savannah.gnu.org ([199.232.41.69]) by sv.gnu.org with esmtp (Exim 4.63) (envelope-from ) id 1Lavf9-0005Yq-Du for qemu-devel@nongnu.org; Sat, 21 Feb 2009 17:29:15 +0000 Received: from blueswir1 by cvs.savannah.gnu.org with local (Exim 4.63) (envelope-from ) id 1Lavf9-0005Ym-77 for qemu-devel@nongnu.org; Sat, 21 Feb 2009 17:29:15 +0000 MIME-Version: 1.0 Errors-To: blueswir1 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit From: Blue Swirl Message-Id: Date: Sat, 21 Feb 2009 17:29:15 +0000 Subject: [Qemu-devel] [6637] Turn MMU off on reset Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Revision: 6637 http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=6637 Author: blueswir1 Date: 2009-02-21 17:29:14 +0000 (Sat, 21 Feb 2009) Log Message: ----------- Turn MMU off on reset Modified Paths: -------------- trunk/target-ppc/helper.c Modified: trunk/target-ppc/helper.c =================================================================== --- trunk/target-ppc/helper.c 2009-02-21 11:13:51 UTC (rev 6636) +++ trunk/target-ppc/helper.c 2009-02-21 17:29:14 UTC (rev 6637) @@ -2735,12 +2735,12 @@ msr |= (target_ulong)1 << MSR_VR; /* Allow altivec usage */ msr |= (target_ulong)1 << MSR_SPE; /* Allow SPE usage */ msr |= (target_ulong)1 << MSR_PR; - env->msr = msr & env->msr_mask; #else env->nip = env->hreset_vector | env->excp_prefix; if (env->mmu_model != POWERPC_MMU_REAL) ppc_tlb_invalidate_all(env); #endif + env->msr = msr & env->msr_mask; hreg_compute_hflags(env); env->reserve = (target_ulong)-1ULL; /* Be sure no exception or interrupt is pending */