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From: Aurelien Jarno <aurelien@aurel32.net>
To: qemu-devel@nongnu.org
Subject: [Qemu-devel] [6662] kvm/powerpc: Add irq support for E500 core
Date: Mon, 02 Mar 2009 16:42:33 +0000	[thread overview]
Message-ID: <E1LeBDt-0003wm-9U@cvs.savannah.gnu.org> (raw)

Revision: 6662
          http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=6662
Author:   aurel32
Date:     2009-03-02 16:42:32 +0000 (Mon, 02 Mar 2009)
Log Message:
-----------
kvm/powerpc: Add irq support for E500 core

Signed-off-by: Liu Yu <yu.liu@freescale.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

Modified Paths:
--------------
    trunk/hw/ppc.c
    trunk/hw/ppc.h
    trunk/target-ppc/cpu.h
    trunk/target-ppc/translate_init.c

Modified: trunk/hw/ppc.c
===================================================================
--- trunk/hw/ppc.c	2009-03-02 16:42:23 UTC (rev 6661)
+++ trunk/hw/ppc.c	2009-03-02 16:42:32 UTC (rev 6662)
@@ -314,6 +314,66 @@
                                                   env, PPC40x_INPUT_NB);
 }
 
+/* PowerPC E500 internal IRQ controller */
+static void ppce500_set_irq (void *opaque, int pin, int level)
+{
+    CPUState *env = opaque;
+    int cur_level;
+
+    LOG_IRQ("%s: env %p pin %d level %d\n", __func__,
+                env, pin, level);
+    cur_level = (env->irq_input_state >> pin) & 1;
+    /* Don't generate spurious events */
+    if ((cur_level == 1 && level == 0) || (cur_level == 0 && level != 0)) {
+        switch (pin) {
+        case PPCE500_INPUT_MCK:
+            if (level) {
+                LOG_IRQ("%s: reset the PowerPC system\n",
+                            __func__);
+                qemu_system_reset_request();
+            }
+            break;
+        case PPCE500_INPUT_RESET_CORE:
+            if (level) {
+                LOG_IRQ("%s: reset the PowerPC core\n", __func__);
+                ppc_set_irq(env, PPC_INTERRUPT_MCK, level);
+            }
+            break;
+        case PPCE500_INPUT_CINT:
+            /* Level sensitive - active high */
+            LOG_IRQ("%s: set the critical IRQ state to %d\n",
+                        __func__, level);
+            ppc_set_irq(env, PPC_INTERRUPT_CEXT, level);
+            break;
+        case PPCE500_INPUT_INT:
+            /* Level sensitive - active high */
+            LOG_IRQ("%s: set the core IRQ state to %d\n",
+                        __func__, level);
+            ppc_set_irq(env, PPC_INTERRUPT_EXT, level);
+            break;
+        case PPCE500_INPUT_DEBUG:
+            /* Level sensitive - active high */
+            LOG_IRQ("%s: set the debug pin state to %d\n",
+                        __func__, level);
+            ppc_set_irq(env, PPC_INTERRUPT_DEBUG, level);
+            break;
+        default:
+            /* Unknown pin - do nothing */
+            LOG_IRQ("%s: unknown IRQ pin %d\n", __func__, pin);
+            return;
+        }
+        if (level)
+            env->irq_input_state |= 1 << pin;
+        else
+            env->irq_input_state &= ~(1 << pin);
+    }
+}
+
+void ppce500_irq_init (CPUState *env)
+{
+    env->irq_inputs = (void **)qemu_allocate_irqs(&ppce500_set_irq,
+                                        env, PPCE500_INPUT_NB);
+}
 /*****************************************************************************/
 /* PowerPC time base and decrementer emulation */
 struct ppc_tb_t {

Modified: trunk/hw/ppc.h
===================================================================
--- trunk/hw/ppc.h	2009-03-02 16:42:23 UTC (rev 6661)
+++ trunk/hw/ppc.h	2009-03-02 16:42:32 UTC (rev 6662)
@@ -31,6 +31,7 @@
 void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val);
 
 void ppc40x_irq_init (CPUState *env);
+void ppce500_irq_init (CPUState *env);
 void ppc6xx_irq_init (CPUState *env);
 void ppc970_irq_init (CPUState *env);
 

Modified: trunk/target-ppc/cpu.h
===================================================================
--- trunk/target-ppc/cpu.h	2009-03-02 16:42:23 UTC (rev 6661)
+++ trunk/target-ppc/cpu.h	2009-03-02 16:42:32 UTC (rev 6662)
@@ -1356,6 +1356,16 @@
 };
 
 enum {
+    /* PowerPC E500 input pins */
+    PPCE500_INPUT_RESET_CORE = 0,
+    PPCE500_INPUT_MCK        = 1,
+    PPCE500_INPUT_CINT       = 3,
+    PPCE500_INPUT_INT        = 4,
+    PPCE500_INPUT_DEBUG      = 6,
+    PPCE500_INPUT_NB,
+};
+
+enum {
     /* PowerPC 40x input pins */
     PPC40x_INPUT_RESET_CORE = 0,
     PPC40x_INPUT_RESET_CHIP = 1,

Modified: trunk/target-ppc/translate_init.c
===================================================================
--- trunk/target-ppc/translate_init.c	2009-03-02 16:42:23 UTC (rev 6661)
+++ trunk/target-ppc/translate_init.c	2009-03-02 16:42:32 UTC (rev 6662)
@@ -63,6 +63,7 @@
 PPC_IRQ_INIT_FN(40x);
 PPC_IRQ_INIT_FN(6xx);
 PPC_IRQ_INIT_FN(970);
+PPC_IRQ_INIT_FN(e500);
 
 /* Generic callbacks:
  * do nothing but store/retrieve spr value
@@ -4198,7 +4199,6 @@
 #define check_pow_e500v2       check_pow_hid0
 #define init_proc_e500v2       init_proc_e500
 
-__attribute__ (( unused ))
 static void init_proc_e500 (CPUPPCState *env)
 {
     /* Time base */
@@ -4300,7 +4300,8 @@
     init_excp_e200(env);
     env->dcache_line_size = 32;
     env->icache_line_size = 32;
-    /* XXX: TODO: allocate internal IRQ controller */
+    /* Allocate hardware IRQ controller */
+    ppce500_irq_init(env);
 }
 
 /* Non-embedded PowerPC                                                      */

                 reply	other threads:[~2009-03-02 16:42 UTC|newest]

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