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From: malc <av1474@comtv.ru>
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Date: Mon, 02 Mar 2009 22:39:40 +0000
Subject: [Qemu-devel] [6667] Fix mtcrf/mfcr
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To: qemu-devel@nongnu.org

Revision: 6667
          http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=6667
Author:   malc
Date:     2009-03-02 22:39:39 +0000 (Mon, 02 Mar 2009)
Log Message:
-----------
Fix mtcrf/mfcr

Noticed by Alexander Graf

Modified Paths:
--------------
    trunk/target-ppc/translate.c

Modified: trunk/target-ppc/translate.c
===================================================================
--- trunk/target-ppc/translate.c	2009-03-02 17:13:21 UTC (rev 6666)
+++ trunk/target-ppc/translate.c	2009-03-02 22:39:39 UTC (rev 6667)
@@ -3843,9 +3843,11 @@
 
     if (likely(ctx->opcode & 0x00100000)) {
         crm = CRM(ctx->opcode);
-        if (likely((crm ^ (crm - 1)) == 0)) {
-            crn = ffs(crm);
+        if (likely(crm && ((crm & (crm - 1)) == 0))) {
+            crn = ffs (crm) - 1;
             tcg_gen_extu_i32_tl(cpu_gpr[rD(ctx->opcode)], cpu_crf[7 - crn]);
+            tcg_gen_shli_i32(cpu_gpr[rD(ctx->opcode)],
+                             cpu_gpr[rD(ctx->opcode)], crn * 4);
         }
     } else {
         gen_helper_load_cr(cpu_gpr[rD(ctx->opcode)]);
@@ -3935,13 +3937,15 @@
     uint32_t crm, crn;
 
     crm = CRM(ctx->opcode);
-    if (likely((ctx->opcode & 0x00100000) || (crm ^ (crm - 1)) == 0)) {
-        TCGv_i32 temp = tcg_temp_new_i32();
-        crn = ffs(crm);
-        tcg_gen_trunc_tl_i32(temp, cpu_gpr[rS(ctx->opcode)]);
-        tcg_gen_shri_i32(cpu_crf[7 - crn], temp, crn * 4);
-        tcg_gen_andi_i32(cpu_crf[7 - crn], cpu_crf[7 - crn], 0xf);
-        tcg_temp_free_i32(temp);
+    if (likely((ctx->opcode & 0x00100000))) {
+        if (crm && ((crm & (crm - 1)) == 0)) {
+            TCGv_i32 temp = tcg_temp_new_i32();
+            crn = ffs (crm) - 1;
+            tcg_gen_trunc_tl_i32(temp, cpu_gpr[rS(ctx->opcode)]);
+            tcg_gen_shri_i32(cpu_crf[7 - crn], temp, crn * 4);
+            tcg_gen_andi_i32(cpu_crf[7 - crn], cpu_crf[7 - crn], 0xf);
+            tcg_temp_free_i32(temp);
+        }
     } else {
         TCGv_i32 temp = tcg_const_i32(crm);
         gen_helper_store_cr(cpu_gpr[rS(ctx->opcode)], temp);