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From: Blue Swirl <blauwirbel@gmail.com>
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Date: Sat, 07 Mar 2009 20:55:01 +0000
Subject: [Qemu-devel] [6752] Enable 64bit mode on interrupts
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Revision: 6752
          http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=6752
Author:   blueswir1
Date:     2009-03-07 20:54:59 +0000 (Sat, 07 Mar 2009)
Log Message:
-----------
Enable 64bit mode on interrupts

Real 970s enable MSR_SF on all interrupts. The current code didn't do
this until now, so let's activate it!

Signed-off-by: Alexander Graf <alex@csgraf.de>

Modified Paths:
--------------
    trunk/target-ppc/helper.c

Modified: trunk/target-ppc/helper.c
===================================================================
--- trunk/target-ppc/helper.c	2009-03-07 20:54:03 UTC (rev 6751)
+++ trunk/target-ppc/helper.c	2009-03-07 20:54:59 UTC (rev 6752)
@@ -2612,7 +2612,7 @@
             new_msr |= (target_ulong)1 << MSR_CM;
         }
     } else {
-        if (!msr_isf) {
+        if (!msr_isf && !(env->mmu_model & POWERPC_MMU_64)) {
             new_msr &= ~((target_ulong)1 << MSR_SF);
             vector = (uint32_t)vector;
         } else {
@@ -2793,6 +2793,10 @@
         ppc_tlb_invalidate_all(env);
 #endif
     env->msr = msr & env->msr_mask;
+#if defined(TARGET_PPC64)
+    if (env->mmu_model & POWERPC_MMU_64)
+        env->msr |= (1ULL << MSR_SF);
+#endif
     hreg_compute_hflags(env);
     env->reserve = (target_ulong)-1ULL;
     /* Be sure no exception or interrupt is pending */