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From: Aurelien Jarno <aurelien@aurel32.net>
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Date: Sat, 07 Mar 2009 21:47:53 +0000
Subject: [Qemu-devel] [6765] arm: Fix gic_irq_state.level bitfield type
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Revision: 6765
          http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=6765
Author:   aurel32
Date:     2009-03-07 21:47:53 +0000 (Sat, 07 Mar 2009)
Log Message:
-----------
arm: Fix gic_irq_state.level bitfield type

Found while cleaning up compiler warnings: GIC_*_LEVEL macros strongly
suggest that gic_irq_state.level is intended to be per-CPU and not just
a single, global bit. I'm unable to test the effect, but it seems to be
the most reasonable fix for the apparent brokenness.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

Modified Paths:
--------------
    trunk/hw/arm_gic.c

Modified: trunk/hw/arm_gic.c
===================================================================
--- trunk/hw/arm_gic.c	2009-03-07 21:35:27 UTC (rev 6764)
+++ trunk/hw/arm_gic.c	2009-03-07 21:47:53 UTC (rev 6765)
@@ -39,7 +39,7 @@
     unsigned enabled:1;
     unsigned pending:NCPU;
     unsigned active:NCPU;
-    unsigned level:1;
+    unsigned level:NCPU;
     unsigned model:1; /* 0 = N:N, 1 = 1:N */
     unsigned trigger:1; /* nonzero = edge triggered.  */
 } gic_irq_state;