[Qemu-devel] [7126] target-mips: optimize gen_flt3_ldst()

[Qemu-devel] [7126] target-mips: optimize gen_flt3_ldst()

[Aurelien Jarno]

Revision: 7126
          http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=7126
Author:   aurel32
Date:     2009-04-16 11:51:11 +0000 (Thu, 16 Apr 2009)
Log Message:
-----------
target-mips: optimize gen_flt3_ldst()

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

Modified Paths:
--------------
    trunk/target-mips/translate.c

Modified: trunk/target-mips/translate.c
===================================================================
--- trunk/target-mips/translate.c	2009-04-16 11:51:03 UTC (rev 7125)
+++ trunk/target-mips/translate.c	2009-04-16 11:51:11 UTC (rev 7126)
@@ -7221,7 +7221,6 @@
     const char *opn = "extended float load/store";
     int store = 0;
     TCGv t0 = tcg_temp_new();
-    TCGv t1 = tcg_temp_new();
 
     if (base == 0) {
         gen_load_gpr(t0, index);
@@ -7240,8 +7239,8 @@
         {
             TCGv_i32 fp0 = tcg_temp_new_i32();
 
-            tcg_gen_qemu_ld32s(t1, t0, ctx->mem_idx);
-            tcg_gen_trunc_tl_i32(fp0, t1);
+            tcg_gen_qemu_ld32s(t0, t0, ctx->mem_idx);
+            tcg_gen_trunc_tl_i32(fp0, t0);
             gen_store_fpr32(fp0, fd);
             tcg_temp_free_i32(fp0);
         }
@@ -7275,11 +7274,13 @@
         check_cop1x(ctx);
         {
             TCGv_i32 fp0 = tcg_temp_new_i32();
+            TCGv t1 = tcg_temp_new();
 
             gen_load_fpr32(fp0, fs);
             tcg_gen_extu_i32_tl(t1, fp0);
             tcg_gen_qemu_st32(t1, t0, ctx->mem_idx);
             tcg_temp_free_i32(fp0);
+            tcg_temp_free_i32(t1);
         }
         opn = "swxc1";
         store = 1;
@@ -7312,7 +7313,6 @@
         break;
     }
     tcg_temp_free(t0);
-    tcg_temp_free(t1);
     MIPS_DEBUG("%s %s, %s(%s)", opn, fregnames[store ? fs : fd],
                regnames[index], regnames[base]);
 }