From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1MSYBN-0001SI-VB for qemu-devel@nongnu.org; Sun, 19 Jul 2009 11:20:10 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1MSYBN-0001Rr-Ej for qemu-devel@nongnu.org; Sun, 19 Jul 2009 11:20:09 -0400 Received: from [199.232.76.173] (port=55090 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1MSYBN-0001Rj-8X for qemu-devel@nongnu.org; Sun, 19 Jul 2009 11:20:09 -0400 Received: from a40-prg1-8-129.static.adsl.vol.cz ([88.146.54.129]:53359 helo=FilipNavara-PC) by monty-python.gnu.org with smtp (Exim 4.60) (envelope-from ) id 1MSYBL-00036e-Vk for qemu-devel@nongnu.org; Sun, 19 Jul 2009 11:20:09 -0400 From: Filip Navara Sender: Filip Navara MIME-Version: 1.0 Content-Type: text/plain; Message-Id: Subject: [Qemu-devel] [PATCH 16/18] Convert VFP not to use cpu_T. List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Date: Sun, 19 Jul 2009 15:20:10 -0000 To: qemu-devel@nongnu.org Signed-off-by: Filip Navara --- target-arm/translate.c | 49 ++++++++++++++++++++--------------------------- 1 files changed, 21 insertions(+), 28 deletions(-) diff --git a/target-arm/translate.c b/target-arm/translate.c index 48aa7f3..c9338ff 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -180,12 +180,6 @@ static void store_reg(DisasContext *s, int reg, TCGv var) dead_tmp(var); } - -/* Basic operations. */ -#define gen_op_movl_T1_im(im) tcg_gen_movi_i32(cpu_T[1], im) - -#define gen_op_addl_T1_im(im) tcg_gen_addi_i32(cpu_T[1], cpu_T[1], im) - /* Value extensions. */ #define gen_uxtb(var) tcg_gen_ext8u_i32(var, var) #define gen_uxth(var) tcg_gen_ext16u_i32(var, var) @@ -824,11 +818,6 @@ static inline void gen_st32(TCGv val, TCGv addr, int index) dead_tmp(val); } -static inline void gen_movl_T1_reg(DisasContext *s, int reg) -{ - load_reg_var(s, cpu_T[1], reg); -} - static inline void gen_set_pc_im(uint32_t val) { tcg_gen_movi_i32(cpu_R[15], val); @@ -1048,20 +1037,20 @@ VFP_GEN_FIX(uhto) VFP_GEN_FIX(ulto) #undef VFP_GEN_FIX -static inline void gen_vfp_ld(DisasContext *s, int dp) +static inline void gen_vfp_ld(DisasContext *s, int dp, TCGv addr) { if (dp) - tcg_gen_qemu_ld64(cpu_F0d, cpu_T[1], IS_USER(s)); + tcg_gen_qemu_ld64(cpu_F0d, addr, IS_USER(s)); else - tcg_gen_qemu_ld32u(cpu_F0s, cpu_T[1], IS_USER(s)); + tcg_gen_qemu_ld32u(cpu_F0s, addr, IS_USER(s)); } -static inline void gen_vfp_st(DisasContext *s, int dp) +static inline void gen_vfp_st(DisasContext *s, int dp, TCGv addr) { if (dp) - tcg_gen_qemu_st64(cpu_F0d, cpu_T[1], IS_USER(s)); + tcg_gen_qemu_st64(cpu_F0d, addr, IS_USER(s)); else - tcg_gen_qemu_st32(cpu_F0s, cpu_T[1], IS_USER(s)); + tcg_gen_qemu_st32(cpu_F0s, addr, IS_USER(s)); } static inline long @@ -2617,6 +2606,7 @@ static int disas_vfp_insn(CPUState * env, DisasContext *s, uint32_t insn) { uint32_t rd, rn, rm, op, i, n, offset, delta_d, delta_m, bank_mask; int dp, veclen; + TCGv addr; TCGv tmp; TCGv tmp2; @@ -3207,22 +3197,23 @@ static int disas_vfp_insn(CPUState * env, DisasContext *s, uint32_t insn) else rd = VFP_SREG_D(insn); if (s->thumb && rn == 15) { - gen_op_movl_T1_im(s->pc & ~2); + addr = new_tmp(); + tcg_gen_movi_i32(addr, s->pc & ~2); } else { - gen_movl_T1_reg(s, rn); + addr = load_reg(s, rn); } if ((insn & 0x01200000) == 0x01000000) { /* Single load/store */ offset = (insn & 0xff) << 2; if ((insn & (1 << 23)) == 0) offset = -offset; - gen_op_addl_T1_im(offset); + tcg_gen_addi_i32(addr, addr, offset); if (insn & (1 << 20)) { - gen_vfp_ld(s, dp); + gen_vfp_ld(s, dp, addr); gen_mov_vreg_F0(dp, rd); } else { gen_mov_F0_vreg(dp, rd); - gen_vfp_st(s, dp); + gen_vfp_st(s, dp, addr); } } else { /* load/store multiple */ @@ -3232,7 +3223,7 @@ static int disas_vfp_insn(CPUState * env, DisasContext *s, uint32_t insn) n = insn & 0xff; if (insn & (1 << 24)) /* pre-decrement */ - gen_op_addl_T1_im(-((insn & 0xff) << 2)); + tcg_gen_addi_i32(addr, addr, -((insn & 0xff) << 2)); if (dp) offset = 8; @@ -3241,14 +3232,14 @@ static int disas_vfp_insn(CPUState * env, DisasContext *s, uint32_t insn) for (i = 0; i < n; i++) { if (insn & ARM_CP_RW_BIT) { /* load */ - gen_vfp_ld(s, dp); + gen_vfp_ld(s, dp, addr); gen_mov_vreg_F0(dp, rd + i); } else { /* store */ gen_mov_F0_vreg(dp, rd + i); - gen_vfp_st(s, dp); + gen_vfp_st(s, dp, addr); } - gen_op_addl_T1_im(offset); + tcg_gen_addi_i32(addr, addr, offset); } if (insn & (1 << 21)) { /* writeback */ @@ -3260,8 +3251,10 @@ static int disas_vfp_insn(CPUState * env, DisasContext *s, uint32_t insn) offset = 0; if (offset != 0) - gen_op_addl_T1_im(offset); - gen_movl_reg_T1(s, rn); + tcg_gen_addi_i32(addr, addr, offset); + store_reg(s, rn, addr); + } else { + dead_tmp(addr); } } } -- 1.6.3.2.1299.gee46c