* [Qemu-devel] amd64 compile
@ 2004-04-25 15:32 Martin Garton
2004-04-25 16:07 ` J. Mayer
0 siblings, 1 reply; 11+ messages in thread
From: Martin Garton @ 2004-04-25 15:32 UTC (permalink / raw)
To: qemu-devel
[-- Attachment #1: Type: TEXT/PLAIN, Size: 361 bytes --]
Hi,
qemu compile fails on amd64. the attached patch gives a succesful compile
with targets list "i386 i386-softmmu" It still doesn't run, and i386-user
still doesn't compile.
I don't know if my patch is neccesarily correct. I would appreciate
any feedback.
Also, if anyone has got and further than I have on amd64, I would like to
hear.
Regards,
Martin.
[-- Attachment #2: Type: TEXT/PLAIN, Size: 2567 bytes --]
? amd64_compile.patch
? arm-user
? config-host.h
? config-host.mak
? dyngen
? i386
? i386-softmmu
? i386-user
? ppc-softmmu
? ppc-user
? qemu-doc.html
? qemu-mkcow
? qemu-tech.html
? qemu.1
? sparc-user
Index: Makefile
===================================================================
RCS file: /cvsroot/qemu/qemu/Makefile,v
retrieving revision 1.61
diff -u -r1.61 Makefile
--- Makefile 4 Apr 2004 15:21:17 -0000 1.61
+++ Makefile 25 Apr 2004 15:30:51 -0000
@@ -1,6 +1,6 @@
include config-host.mak
-CFLAGS=-Wall -O2 -g
+CFLAGS= -O2 -g
ifdef CONFIG_WIN32
CFLAGS+=-fpack-struct
endif
Index: Makefile.target
===================================================================
RCS file: /cvsroot/qemu/qemu/Makefile.target,v
retrieving revision 1.26
diff -u -r1.26 Makefile.target
--- Makefile.target 22 Apr 2004 00:02:08 -0000 1.26
+++ Makefile.target 25 Apr 2004 15:30:51 -0000
@@ -7,7 +7,7 @@
VPATH+=:$(SRC_PATH)/linux-user
DEFINES+=-I$(SRC_PATH)/linux-user -I$(SRC_PATH)/linux-user/$(TARGET_ARCH)
endif
-CFLAGS=-Wall -O2 -g
+CFLAGS=-O2 -g
LDFLAGS=-g
LIBS=
HELPER_CFLAGS=$(CFLAGS)
@@ -121,7 +121,7 @@
ifeq ($(ARCH),alpha)
# -msmall-data is not used because we want two-instruction relocations
# for the constant constructions
-OP_CFLAGS=-Wall -O2 -g
+OP_CFLAGS=-O2 -g
# Ensure there's only a single GP
CFLAGS += -msmall-data
LDFLAGS+=-Wl,-T,$(SRC_PATH)/alpha.ld
Index: dyngen-exec.h
===================================================================
RCS file: /cvsroot/qemu/qemu/dyngen-exec.h,v
retrieving revision 1.10
diff -u -r1.10 dyngen-exec.h
--- dyngen-exec.h 21 Mar 2004 17:06:25 -0000 1.10
+++ dyngen-exec.h 25 Apr 2004 15:30:51 -0000
@@ -25,12 +25,16 @@
typedef unsigned char uint8_t;
typedef unsigned short uint16_t;
typedef unsigned int uint32_t;
+#ifndef __x86_64__
typedef unsigned long long uint64_t;
+#endif
typedef signed char int8_t;
typedef signed short int16_t;
typedef signed int int32_t;
+#ifndef __x86_64__
typedef signed long long int64_t;
+#endif
#define INT8_MIN (-128)
#define INT16_MIN (-32767-1)
Index: vl.c
===================================================================
RCS file: /cvsroot/qemu/qemu/vl.c,v
retrieving revision 1.61
diff -u -r1.61 vl.c
--- vl.c 22 Apr 2004 00:35:09 -0000 1.61
+++ vl.c 25 Apr 2004 15:30:53 -0000
@@ -353,7 +353,7 @@
return ((int64_t)h << 32) | l;
}
-#elif defined(__i386__)
+#elif defined(__i386__) || defined(__x86_64__)
int64_t cpu_get_real_ticks(void)
{
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [Qemu-devel] amd64 compile
2004-04-25 15:32 [Qemu-devel] amd64 compile Martin Garton
@ 2004-04-25 16:07 ` J. Mayer
2004-04-25 16:23 ` Martin Garton
2004-04-25 17:46 ` [Qemu-devel] " Gabriel Ebner
0 siblings, 2 replies; 11+ messages in thread
From: J. Mayer @ 2004-04-25 16:07 UTC (permalink / raw)
To: qemu-devel
[-- Attachment #1: Type: text/plain, Size: 1309 bytes --]
On Sun, 2004-04-25 at 17:32, Martin Garton wrote:
> Hi,
Hi,
> qemu compile fails on amd64. the attached patch gives a succesful compile
> with targets list "i386 i386-softmmu" It still doesn't run, and i386-user
> still doesn't compile.
Your patch is incorrect:
- don't remove the -Wall: the warnings you can see are mostly bugs due
to the fact that qemu assumes that unsigned long is 32 bits long.
- the correct cpu_get_real_ticks patch has already been posted by art
yerkes some times ago. I also re-send it as a reminder.
- to compile qemu usermode emulation, you need to edit the amd64.ld
file, which is duplicated. Remove half of the file, and the link won't
fail.
There are many other problems with qemu and amd64. I submitted a patch
to Fabrice to make qemu PPC softmmu emulation run on my machine. You can
find this patch attached.
I just found another bug in VGA emulation. The fix makes the BIOS start,
but I still have random crashes in tb_link_phys when trying to launch
FreeDOS.
I also noticed that SDL isn't usable when qemu is launched in a 32 bits
chrooted environnement. So, we really need a usable amd64 native
target... With the attached patches, only PPC emulation will run. I
didn't try to find x86 related bugs, for now.
Regards.
--
J. Mayer <l_indien@magic.fr>
Never organized
[-- Attachment #2: amd64.diff --]
[-- Type: text/x-patch, Size: 54780 bytes --]
? .cvsignore
Index: Makefile.target
===================================================================
RCS file: /cvsroot/qemu/qemu/Makefile.target,v
retrieving revision 1.25
diff -u -d -w -B -b -d -p -r1.25 Makefile.target
--- Makefile.target 12 Apr 2004 20:39:28 -0000 1.25
+++ Makefile.target 18 Apr 2004 15:21:19 -0000
@@ -56,6 +56,12 @@ PROGS+=$(QEMU_SYSTEM)
endif
endif # ARCH = i386
+ifeq ($(ARCH), amd64)
+ifdef CONFIG_SOFTMMU
+PROGS+=$(QEMU_SYSTEM)
+endif
+endif # ARCH = i386
+
endif # TARGET_ARCH = ppc
endif # !CONFIG_USER_ONLY
Index: cpu-all.h
===================================================================
RCS file: /cvsroot/qemu/qemu/cpu-all.h,v
retrieving revision 1.24
diff -u -d -w -B -b -d -p -r1.24 cpu-all.h
--- cpu-all.h 31 Mar 2004 18:52:07 -0000 1.24
+++ cpu-all.h 18 Apr 2004 15:21:19 -0000
@@ -620,8 +620,8 @@ extern int code_copy_enabled;
#define CPU_INTERRUPT_EXITTB 0x04 /* exit the current TB (use for x86 a20 case) */
void cpu_interrupt(CPUState *s, int mask);
-int cpu_breakpoint_insert(CPUState *env, uint32_t pc);
-int cpu_breakpoint_remove(CPUState *env, uint32_t pc);
+int cpu_breakpoint_insert(CPUState *env, target_ulong pc);
+int cpu_breakpoint_remove(CPUState *env, target_ulong pc);
void cpu_single_step(CPUState *env, int enabled);
/* Return the physical page corresponding to a virtual one. Use it
@@ -682,11 +682,12 @@ extern uint8_t *phys_ram_dirty;
#define IO_MEM_NOTDIRTY (4 << IO_MEM_SHIFT) /* used internally, never use directly */
/* NOTE: vaddr is only used internally. Never use it except if you know what you do */
-typedef void CPUWriteMemoryFunc(uint32_t addr, uint32_t value, uint32_t vaddr);
-typedef uint32_t CPUReadMemoryFunc(uint32_t addr);
+typedef void CPUWriteMemoryFunc(unsigned long addr, uint32_t value,
+ target_ulong vaddr);
+typedef uint32_t CPUReadMemoryFunc(unsigned long addr);
-void cpu_register_physical_memory(unsigned long start_addr, unsigned long size,
- long phys_offset);
+void cpu_register_physical_memory(target_ulong start_addr, target_ulong size,
+ target_long phys_offset);
int cpu_register_io_memory(int io_index,
CPUReadMemoryFunc **mem_read,
CPUWriteMemoryFunc **mem_write);
Index: cpu-defs.h
===================================================================
RCS file: /cvsroot/qemu/qemu/cpu-defs.h,v
retrieving revision 1.5
diff -u -d -w -B -b -d -p -r1.5 cpu-defs.h
--- cpu-defs.h 21 Mar 2004 17:06:25 -0000 1.5
+++ cpu-defs.h 18 Apr 2004 15:21:19 -0000
@@ -66,7 +66,7 @@ typedef struct CPUTLBEntry {
*/
uint32_t address;
/* addend to virtual address to get physical address */
- uint32_t addend;
+ unsigned long addend;
} CPUTLBEntry;
#endif
Index: cpu-exec.c
===================================================================
RCS file: /cvsroot/qemu/qemu/cpu-exec.c,v
retrieving revision 1.33
diff -u -d -w -B -b -d -p -r1.33 cpu-exec.c
--- cpu-exec.c 12 Apr 2004 20:39:28 -0000 1.33
+++ cpu-exec.c 18 Apr 2004 15:21:19 -0000
@@ -275,7 +275,7 @@ int cpu_exec(CPUState *env1)
#elif defined(TARGET_PPC)
flags = 0;
cs_base = 0;
- pc = (uint8_t *)env->nip;
+ pc = PTR(env->nip);
#else
#error unsupported CPU
#endif
@@ -379,7 +379,7 @@ int cpu_exec(CPUState *env1)
#endif
) {
spin_lock(&tb_lock);
- tb_add_jump((TranslationBlock *)(T0 & ~3), T0 & 3, tb);
+ tb_add_jump((TranslationBlock *)PTR(T0 & ~3), T0 & 3, tb);
#if defined(USE_CODE_COPY)
/* propagates the FP use info */
((TranslationBlock *)(T0 & ~3))->cflags |=
Index: dyngen-exec.h
===================================================================
RCS file: /cvsroot/qemu/qemu/dyngen-exec.h,v
retrieving revision 1.10
diff -u -d -w -B -b -d -p -r1.10 dyngen-exec.h
--- dyngen-exec.h 21 Mar 2004 17:06:25 -0000 1.10
+++ dyngen-exec.h 18 Apr 2004 15:21:19 -0000
@@ -25,12 +25,21 @@
typedef unsigned char uint8_t;
typedef unsigned short uint16_t;
typedef unsigned int uint32_t;
+/* XXX may be done for all 64 bits targets ? */
+#if defined (__x86_64__)
+typedef unsigned long uint64_t;
+#else
typedef unsigned long long uint64_t;
+#endif
typedef signed char int8_t;
typedef signed short int16_t;
typedef signed int int32_t;
+#if defined (__x86_64__)
+typedef signed long int64_t;
+#else
typedef signed long long int64_t;
+#endif
#define INT8_MIN (-128)
#define INT16_MIN (-32767-1)
Index: dyngen.c
===================================================================
RCS file: /cvsroot/qemu/qemu/dyngen.c,v
retrieving revision 1.34
diff -u -d -w -B -b -d -p -r1.34 dyngen.c
--- dyngen.c 4 Apr 2004 12:56:28 -0000 1.34
+++ dyngen.c 18 Apr 2004 15:21:20 -0000
@@ -1106,7 +1106,7 @@ void gen_code(const char *name, host_ulo
}
}
- fprintf(outfile, " memcpy(gen_code_ptr, (void *)((char *)&%s+%d), %d);\n", name, start_offset - offset, copy_size);
+ fprintf(outfile, " memcpy(gen_code_ptr, (void *)((char *)&%s+%lu), %d);\n", name, start_offset - offset, copy_size);
/* emit code offset information */
{
@@ -1265,15 +1265,15 @@ void gen_code(const char *name, host_ulo
addend = rel->r_addend;
switch(type) {
case R_X86_64_32:
- fprintf(outfile, " *(uint32_t *)(gen_code_ptr + %d) = (uint32_t)%s + %d;\n",
+ fprintf(outfile, " *(uint32_t *)(gen_code_ptr + %lu) = (uint32_t)%s + %d;\n",
rel->r_offset - start_offset, name, addend);
break;
case R_X86_64_32S:
- fprintf(outfile, " *(uint32_t *)(gen_code_ptr + %d) = (int32_t)%s + %d;\n",
+ fprintf(outfile, " *(uint32_t *)(gen_code_ptr + %lu) = (int32_t)%s + %d;\n",
rel->r_offset - start_offset, name, addend);
break;
case R_X86_64_PC32:
- fprintf(outfile, " *(uint32_t *)(gen_code_ptr + %d) = %s - (long)(gen_code_ptr + %d) + %d;\n",
+ fprintf(outfile, " *(uint32_t *)(gen_code_ptr + %lu) = %s - (long)(gen_code_ptr + %lu) + %d;\n",
rel->r_offset - start_offset, name, rel->r_offset - start_offset, addend);
break;
default:
Index: exec-all.h
===================================================================
RCS file: /cvsroot/qemu/qemu/exec-all.h,v
retrieving revision 1.17
diff -u -d -w -B -b -d -p -r1.17 exec-all.h
--- exec-all.h 12 Apr 2004 20:39:28 -0000 1.17
+++ exec-all.h 18 Apr 2004 15:21:20 -0000
@@ -38,6 +38,9 @@
#define REGPARM(n)
#endif
+#define PTR(value) ((void *)((unsigned long)(value)))
+#define P2LONG(p) ((target_ulong)((unsigned long)(p)))
+
/* is_jmp field values */
#define DISAS_NEXT 0 /* next instruction can be analyzed */
#define DISAS_JUMP 1 /* only pc was modified dynamically */
@@ -89,11 +92,11 @@ int cpu_restore_state_copy(struct Transl
void cpu_exec_init(void);
int page_unprotect(unsigned long address);
void tb_invalidate_page_range(target_ulong start, target_ulong end);
-void tlb_flush_page(CPUState *env, uint32_t addr);
-void tlb_flush_page_write(CPUState *env, uint32_t addr);
+void tlb_flush_page(CPUState *env, target_ulong addr);
+void tlb_flush_page_write(CPUState *env, target_ulong addr);
void tlb_flush(CPUState *env, int flush_global);
-int tlb_set_page(CPUState *env, uint32_t vaddr, uint32_t paddr, int prot,
- int is_user, int is_softmmu);
+int tlb_set_page(CPUState *env, target_ulong vaddr, target_ulong paddr,
+ int prot, int is_user, int is_softmmu);
#define CODE_GEN_MAX_SIZE 65536
#define CODE_GEN_ALIGN 16 /* must be >= of the size of a icache line */
@@ -580,10 +583,10 @@ static inline target_ulong get_phys_addr
(addr & TARGET_PAGE_MASK), 0)) {
#if defined (TARGET_PPC)
env->access_type = ACCESS_CODE;
- ldub_code((void *)addr);
+ ldub_code(PTR(addr));
env->access_type = ACCESS_INT;
#else
- ldub_code((void *)addr);
+ ldub_code(PTR(addr));
#endif
}
return addr + env->tlb_read[is_user][index].addend - (unsigned long)phys_ram_base;
Index: exec.c
===================================================================
RCS file: /cvsroot/qemu/qemu/exec.c,v
retrieving revision 1.30
diff -u -d -w -B -b -d -p -r1.30 exec.c
--- exec.c 12 Apr 2004 20:39:28 -0000 1.30
+++ exec.c 18 Apr 2004 15:21:22 -0000
@@ -65,7 +65,7 @@ uint8_t *phys_ram_dirty;
typedef struct PageDesc {
/* offset in memory of the page + io_index in the low 12 bits */
- unsigned long phys_offset;
+ target_ulong phys_offset;
/* list of TBs intersecting this physical page */
TranslationBlock *first_tb;
/* in order to optimize self modifying code, we count the number
@@ -167,9 +167,10 @@ static inline PageDesc *page_find(unsign
}
#if !defined(CONFIG_USER_ONLY)
-static void tlb_protect_code(CPUState *env, uint32_t addr);
-static void tlb_unprotect_code(CPUState *env, uint32_t addr);
-static void tlb_unprotect_code_phys(CPUState *env, uint32_t phys_addr, target_ulong vaddr);
+static void tlb_protect_code(CPUState *env, target_ulong addr);
+static void tlb_unprotect_code(CPUState *env, target_ulong addr);
+static void tlb_unprotect_code_phys(CPUState *env, target_ulong phys_addr,
+ target_ulong vaddr);
static inline VirtPageDesc *virt_page_find_alloc(unsigned int index)
{
@@ -912,7 +913,7 @@ static void tb_reset_jump_recursive(Tran
/* add a breakpoint. EXCP_DEBUG is returned by the CPU loop if a
breakpoint is reached */
-int cpu_breakpoint_insert(CPUState *env, uint32_t pc)
+int cpu_breakpoint_insert(CPUState *env, target_ulong pc)
{
#if defined(TARGET_I386) || defined(TARGET_PPC)
int i;
@@ -933,7 +934,7 @@ int cpu_breakpoint_insert(CPUState *env,
}
/* remove a breakpoint */
-int cpu_breakpoint_remove(CPUState *env, uint32_t pc)
+int cpu_breakpoint_remove(CPUState *env, target_ulong pc)
{
#if defined(TARGET_I386) || defined(TARGET_PPC)
int i;
@@ -1113,14 +1114,14 @@ void tlb_flush(CPUState *env, int flush_
#endif
}
-static inline void tlb_flush_entry(CPUTLBEntry *tlb_entry, uint32_t addr)
+static inline void tlb_flush_entry(CPUTLBEntry *tlb_entry, target_ulong addr)
{
if (addr == (tlb_entry->address &
(TARGET_PAGE_MASK | TLB_INVALID_MASK)))
tlb_entry->address = -1;
}
-void tlb_flush_page(CPUState *env, uint32_t addr)
+void tlb_flush_page(CPUState *env, target_ulong addr)
{
int i, n;
VirtPageDesc *vp;
@@ -1169,7 +1170,7 @@ void tlb_flush_page(CPUState *env, uint3
#endif
}
-static inline void tlb_protect_code1(CPUTLBEntry *tlb_entry, uint32_t addr)
+static inline void tlb_protect_code1(CPUTLBEntry *tlb_entry, target_ulong addr)
{
if (addr == (tlb_entry->address &
(TARGET_PAGE_MASK | TLB_INVALID_MASK)) &&
@@ -1181,7 +1182,7 @@ static inline void tlb_protect_code1(CPU
/* update the TLBs so that writes to code in the virtual page 'addr'
can be detected */
-static void tlb_protect_code(CPUState *env, uint32_t addr)
+static void tlb_protect_code(CPUState *env, target_ulong addr)
{
int i;
@@ -1197,7 +1198,8 @@ static void tlb_protect_code(CPUState *e
#endif
}
-static inline void tlb_unprotect_code1(CPUTLBEntry *tlb_entry, uint32_t addr)
+static inline void tlb_unprotect_code1(CPUTLBEntry *tlb_entry,
+ target_ulong addr)
{
if (addr == (tlb_entry->address &
(TARGET_PAGE_MASK | TLB_INVALID_MASK)) &&
@@ -1208,7 +1210,7 @@ static inline void tlb_unprotect_code1(C
/* update the TLB so that writes in virtual page 'addr' are no longer
tested self modifying code */
-static void tlb_unprotect_code(CPUState *env, uint32_t addr)
+static void tlb_unprotect_code(CPUState *env, target_ulong addr)
{
int i;
@@ -1219,7 +1221,7 @@ static void tlb_unprotect_code(CPUState
}
static inline void tlb_unprotect_code2(CPUTLBEntry *tlb_entry,
- uint32_t phys_addr)
+ unsigned long phys_addr)
{
if ((tlb_entry->address & ~TARGET_PAGE_MASK) == IO_MEM_CODE &&
((tlb_entry->address & TARGET_PAGE_MASK) + tlb_entry->addend) == phys_addr) {
@@ -1229,15 +1231,17 @@ static inline void tlb_unprotect_code2(C
/* update the TLB so that writes in physical page 'phys_addr' are no longer
tested self modifying code */
-static void tlb_unprotect_code_phys(CPUState *env, uint32_t phys_addr, target_ulong vaddr)
+static void tlb_unprotect_code_phys(CPUState *env, target_ulong phys_addr,
+ target_ulong vaddr)
{
+ unsigned long paddr;
int i;
- phys_addr &= TARGET_PAGE_MASK;
- phys_addr += (long)phys_ram_base;
+ paddr = phys_addr & TARGET_PAGE_MASK;
+ paddr += (unsigned long)phys_ram_base;
i = (vaddr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1);
- tlb_unprotect_code2(&env->tlb_write[0][i], phys_addr);
- tlb_unprotect_code2(&env->tlb_write[1][i], phys_addr);
+ tlb_unprotect_code2(&env->tlb_write[0][i], paddr);
+ tlb_unprotect_code2(&env->tlb_write[1][i], paddr);
}
static inline void tlb_reset_dirty_range(CPUTLBEntry *tlb_entry,
@@ -1255,7 +1259,8 @@ static inline void tlb_reset_dirty_range
void cpu_physical_memory_reset_dirty(target_ulong start, target_ulong end)
{
CPUState *env;
- target_ulong length, start1;
+ unsigned long start1;
+ target_ulong length;
int i;
start &= TARGET_PAGE_MASK;
@@ -1335,14 +1340,15 @@ static inline void tlb_set_dirty(unsigne
is permitted. Return 0 if OK or 2 if the page could not be mapped
(can only happen in non SOFTMMU mode for I/O pages or pages
conflicting with the host address space). */
-int tlb_set_page(CPUState *env, uint32_t vaddr, uint32_t paddr, int prot,
- int is_user, int is_softmmu)
+int tlb_set_page(CPUState *env, target_ulong vaddr, target_ulong paddr,
+ int prot, int is_user, int is_softmmu)
{
PageDesc *p;
target_ulong pd;
TranslationBlock *first_tb;
unsigned int index;
- target_ulong address, addend;
+ unsigned long addend;
+ target_ulong address;
int ret;
p = page_find(paddr >> TARGET_PAGE_BITS);
@@ -1495,16 +1501,16 @@ void tlb_flush(CPUState *env, int flush_
{
}
-void tlb_flush_page(CPUState *env, uint32_t addr)
+void tlb_flush_page(CPUState *env, target_ulong addr)
{
}
-void tlb_flush_page_write(CPUState *env, uint32_t addr)
+void tlb_flush_page_write(CPUState *env, target_ulong addr)
{
}
-int tlb_set_page(CPUState *env, uint32_t vaddr, uint32_t paddr, int prot,
- int is_user, int is_softmmu)
+int tlb_set_page(CPUState *env, target_ulong vaddr, target_ulong paddr,
+ int prot, int is_user, int is_softmmu)
{
return 0;
}
@@ -1652,8 +1658,8 @@ static inline void tlb_set_dirty(unsigne
/* register physical memory. 'size' must be a multiple of the target
page size. If (phys_offset & ~TARGET_PAGE_MASK) != 0, then it is an
io memory page */
-void cpu_register_physical_memory(unsigned long start_addr, unsigned long size,
- long phys_offset)
+void cpu_register_physical_memory(target_ulong start_addr, target_ulong size,
+ target_long phys_offset)
{
unsigned long addr, end_addr;
PageDesc *p;
@@ -1667,12 +1673,13 @@ void cpu_register_physical_memory(unsign
}
}
-static uint32_t unassigned_mem_readb(uint32_t addr)
+static uint32_t unassigned_mem_readb(unsigned long addr)
{
return 0;
}
-static void unassigned_mem_writeb(uint32_t addr, uint32_t val, uint32_t vaddr)
+static void unassigned_mem_writeb(unsigned long addr, uint32_t val,
+ target_ulong vaddr)
{
}
@@ -1691,39 +1698,42 @@ static CPUWriteMemoryFunc *unassigned_me
/* self modifying code support in soft mmu mode : writing to a page
containing code comes to these functions */
-static void code_mem_writeb(uint32_t addr, uint32_t val, uint32_t vaddr)
+static void code_mem_writeb(unsigned long addr, uint32_t val,
+ target_ulong vaddr)
{
unsigned long phys_addr;
- phys_addr = addr - (long)phys_ram_base;
+ phys_addr = addr - (unsigned long)phys_ram_base;
#if !defined(CONFIG_USER_ONLY)
tb_invalidate_phys_page_fast(phys_addr, 1, vaddr);
#endif
- stb_raw((uint8_t *)addr, val);
+ stb_raw(PTR(addr), val);
phys_ram_dirty[phys_addr >> TARGET_PAGE_BITS] = 1;
}
-static void code_mem_writew(uint32_t addr, uint32_t val, uint32_t vaddr)
+static void code_mem_writew(unsigned long addr, uint32_t val,
+ target_ulong vaddr)
{
unsigned long phys_addr;
- phys_addr = addr - (long)phys_ram_base;
+ phys_addr = addr - (unsigned long)phys_ram_base;
#if !defined(CONFIG_USER_ONLY)
tb_invalidate_phys_page_fast(phys_addr, 2, vaddr);
#endif
- stw_raw((uint8_t *)addr, val);
+ stw_raw(PTR(addr), val);
phys_ram_dirty[phys_addr >> TARGET_PAGE_BITS] = 1;
}
-static void code_mem_writel(uint32_t addr, uint32_t val, uint32_t vaddr)
+static void code_mem_writel(unsigned long addr, uint32_t val,
+ target_ulong vaddr)
{
unsigned long phys_addr;
- phys_addr = addr - (long)phys_ram_base;
+ phys_addr = addr - (unsigned long)phys_ram_base;
#if !defined(CONFIG_USER_ONLY)
tb_invalidate_phys_page_fast(phys_addr, 4, vaddr);
#endif
- stl_raw((uint8_t *)addr, val);
+ stl_raw(PTR(addr), val);
phys_ram_dirty[phys_addr >> TARGET_PAGE_BITS] = 1;
}
@@ -1739,21 +1749,24 @@ static CPUWriteMemoryFunc *code_mem_writ
code_mem_writel,
};
-static void notdirty_mem_writeb(uint32_t addr, uint32_t val, uint32_t vaddr)
+static void notdirty_mem_writeb(unsigned long addr, uint32_t val,
+ target_ulong vaddr)
{
- stb_raw((uint8_t *)addr, val);
+ stb_raw(PTR(addr), val);
tlb_set_dirty(addr, vaddr);
}
-static void notdirty_mem_writew(uint32_t addr, uint32_t val, uint32_t vaddr)
+static void notdirty_mem_writew(unsigned long addr, uint32_t val,
+ target_ulong vaddr)
{
- stw_raw((uint8_t *)addr, val);
+ stw_raw(PTR(addr), val);
tlb_set_dirty(addr, vaddr);
}
-static void notdirty_mem_writel(uint32_t addr, uint32_t val, uint32_t vaddr)
+static void notdirty_mem_writel(unsigned long addr, uint32_t val,
+ target_ulong vaddr)
{
- stl_raw((uint8_t *)addr, val);
+ stl_raw(PTR(addr), val);
tlb_set_dirty(addr, vaddr);
}
Index: monitor.c
===================================================================
RCS file: /cvsroot/qemu/qemu/monitor.c,v
retrieving revision 1.8
diff -u -d -w -B -b -d -p -r1.8 monitor.c
--- monitor.c 12 Apr 2004 20:39:28 -0000 1.8
+++ monitor.c 18 Apr 2004 15:21:22 -0000
@@ -1060,9 +1060,9 @@ static void term_handle_command(const ch
}
if (nb_args + 3 > MAX_ARGS)
goto error_args;
- args[nb_args++] = (void*)count;
- args[nb_args++] = (void*)format;
- args[nb_args++] = (void*)size;
+ args[nb_args++] = PTR(count);
+ args[nb_args++] = PTR(format);
+ args[nb_args++] = PTR(size);
}
break;
case 'i':
@@ -1078,7 +1078,7 @@ static void term_handle_command(const ch
has_arg = 1;
if (nb_args >= MAX_ARGS)
goto error_args;
- args[nb_args++] = (void *)has_arg;
+ args[nb_args++] = PTR(has_arg);
if (!has_arg) {
if (nb_args >= MAX_ARGS)
goto error_args;
@@ -1091,7 +1091,7 @@ static void term_handle_command(const ch
add_num:
if (nb_args >= MAX_ARGS)
goto error_args;
- args[nb_args++] = (void *)val;
+ args[nb_args++] = PTR(val);
}
break;
case '-':
@@ -1117,7 +1117,7 @@ static void term_handle_command(const ch
}
if (nb_args >= MAX_ARGS)
goto error_args;
- args[nb_args++] = (void *)has_option;
+ args[nb_args++] = PTR(has_option);
}
break;
default:
Index: oss.c
===================================================================
RCS file: /cvsroot/qemu/qemu/oss.c,v
retrieving revision 1.3
diff -u -d -w -B -b -d -p -r1.3 oss.c
--- oss.c 31 Mar 2004 23:37:16 -0000 1.3
+++ oss.c 18 Apr 2004 15:21:22 -0000
@@ -379,7 +379,7 @@ void AUD_run (void)
left = bufsize - rpos;
play = MIN (left, bytes);
- written = write (audio_fd, (void *) ((uint32_t) buf + rpos), play);
+ written = write (audio_fd, PTR(buf + rpos), play);
if (-1 == written) {
if (EAGAIN == errno || EINTR == errno) {
Index: vl.c
===================================================================
RCS file: /cvsroot/qemu/qemu/vl.c,v
retrieving revision 1.59
diff -u -d -w -B -b -d -p -r1.59 vl.c
--- vl.c 12 Apr 2004 20:39:28 -0000 1.59
+++ vl.c 18 Apr 2004 15:21:39 -0000
@@ -1248,14 +1248,14 @@ int qemu_loadvm(const char *filename)
static void cpu_put_seg(QEMUFile *f, SegmentCache *dt)
{
- qemu_put_be32(f, (uint32_t)dt->base);
+ qemu_put_be32(f, P2LONG(dt->base));
qemu_put_be32(f, dt->limit);
qemu_put_be32(f, dt->flags);
}
static void cpu_get_seg(QEMUFile *f, SegmentCache *dt)
{
- dt->base = (uint8_t *)qemu_get_be32(f);
+ dt->base = PTR(qemu_get_be32(f));
dt->limit = qemu_get_be32(f);
dt->flags = qemu_get_be32(f);
}
Index: vl.h
===================================================================
RCS file: /cvsroot/qemu/qemu/vl.h,v
retrieving revision 1.19
diff -u -d -w -B -b -d -p -r1.19 vl.h
--- vl.h 12 Apr 2004 20:54:52 -0000 1.19
+++ vl.h 18 Apr 2004 15:21:39 -0000
@@ -56,6 +56,9 @@
#define tostring(s) #s
#endif
+#define PTR(value) ((void *)((unsigned long)(value)))
+#define P2LONG(p) ((target_ulong)((unsigned long)(p)))
+
#if defined(WORDS_BIGENDIAN)
static inline uint32_t be32_to_cpu(uint32_t v)
{
Index: hw/ppc_prep.c
===================================================================
RCS file: /cvsroot/qemu/qemu/hw/ppc_prep.c,v
retrieving revision 1.2
diff -u -d -w -B -b -d -p -r1.2 ppc_prep.c
--- hw/ppc_prep.c 12 Apr 2004 20:54:52 -0000 1.2
+++ hw/ppc_prep.c 18 Apr 2004 15:21:39 -0000
@@ -104,7 +104,8 @@ static int ne2000_irq[NE2000_NB_MAX] = {
/* IO ports emulation */
#define PPC_IO_BASE 0x80000000
-static void PPC_io_writeb (uint32_t addr, uint32_t value, uint32_t vaddr)
+static void PPC_io_writeb (unsigned long addr, uint32_t value,
+ target_ulong vaddr)
{
/* Don't polute serial port output */
#if 0
@@ -121,7 +122,7 @@ static void PPC_io_writeb (uint32_t addr
cpu_outb(NULL, addr - PPC_IO_BASE, value);
}
-static uint32_t PPC_io_readb (uint32_t addr)
+static uint32_t PPC_io_readb (unsigned long addr)
{
uint32_t ret = cpu_inb(NULL, addr - PPC_IO_BASE);
@@ -141,7 +142,8 @@ static uint32_t PPC_io_readb (uint32_t a
return ret;
}
-static void PPC_io_writew (uint32_t addr, uint32_t value, uint32_t vaddr)
+static void PPC_io_writew (unsigned long addr, uint32_t value,
+ target_ulong vaddr)
{
if ((addr < 0x800001f0 || addr > 0x800001f7) &&
(addr < 0x80000170 || addr > 0x80000177)) {
@@ -150,7 +152,7 @@ static void PPC_io_writew (uint32_t addr
cpu_outw(NULL, addr - PPC_IO_BASE, value);
}
-static uint32_t PPC_io_readw (uint32_t addr)
+static uint32_t PPC_io_readw (unsigned long addr)
{
uint32_t ret = cpu_inw(NULL, addr - PPC_IO_BASE);
@@ -162,13 +164,14 @@ static uint32_t PPC_io_readw (uint32_t a
return ret;
}
-static void PPC_io_writel (uint32_t addr, uint32_t value, uint32_t vaddr)
+static void PPC_io_writel (unsigned long addr, uint32_t value,
+ target_ulong vaddr)
{
PPC_IO_DPRINTF("0x%08x => 0x%08x\n", addr - PPC_IO_BASE, value);
cpu_outl(NULL, addr - PPC_IO_BASE, value);
}
-static uint32_t PPC_io_readl (uint32_t addr)
+static uint32_t PPC_io_readl (unsigned long addr)
{
uint32_t ret = cpu_inl(NULL, addr - PPC_IO_BASE);
@@ -190,12 +193,13 @@ static CPUReadMemoryFunc *PPC_io_read[]
};
/* Read-only register (?) */
-static void _PPC_ioB_write (uint32_t addr, uint32_t value, uint32_t vaddr)
+static void _PPC_ioB_write (unsigned long addr, uint32_t value,
+ target_ulong vaddr)
{
// printf("%s: 0x%08x => 0x%08x\n", __func__, addr, value);
}
-static uint32_t _PPC_ioB_read (uint32_t addr)
+static uint32_t _PPC_ioB_read (unsigned long addr)
{
uint32_t retval = 0;
@@ -669,6 +673,15 @@ static void VGA_init (void)
extern CPUPPCState *global_env;
+uint32_t get_le32 (void *addr)
+{
+#ifdef WORDS_BIGENDIAN
+ return bswap32(addr);
+#else
+ return *((uint32_t *)addr);
+#endif
+}
+
void PPC_init_hw (/*CPUPPCState *env,*/ uint32_t mem_size,
uint32_t kernel_addr, uint32_t kernel_size,
uint32_t stack_addr, int boot_device,
@@ -689,8 +702,7 @@ void PPC_init_hw (/*CPUPPCState *env,*/
/* Fake bootloader */
{
#if 1
- uint32_t offset =
- *((uint32_t *)((uint32_t)phys_ram_base + kernel_addr));
+ uint32_t offset = get_le32(phys_ram_base + kernel_addr);
#else
uint32_t offset = 12;
#endif
@@ -715,7 +727,7 @@ void PPC_init_hw (/*CPUPPCState *env,*/
* it's not ready to handle it...
*/
env->decr = 0xFFFFFFFF;
- p = (void *)(phys_ram_base + kernel_addr);
+ p = phys_ram_base + kernel_addr;
#if !defined (USE_OPEN_FIRMWARE)
/* Let's register the whole memory available only in supervisor mode */
setup_BAT(env, 0, 0x00000000, 0x00000000, mem_size, 1, 0, 2);
@@ -724,7 +736,7 @@ void PPC_init_hw (/*CPUPPCState *env,*/
*/
put_long(p, 0xdeadc0de);
/* Build a real stack room */
- p = (void *)(phys_ram_base + stack_addr);
+ p = phys_ram_base + stack_addr;
put_long(p, stack_addr);
p -= 32;
env->gpr[1] -= 32;
@@ -733,8 +745,7 @@ void PPC_init_hw (/*CPUPPCState *env,*/
if (initrd_file != NULL) {
int size;
env->gpr[4] = (kernel_addr + kernel_size + 4095) & ~4095;
- size = load_initrd(initrd_file,
- (void *)((uint32_t)phys_ram_base + env->gpr[4]));
+ size = load_initrd(initrd_file, phys_ram_base + env->gpr[4]);
if (size < 0) {
/* No initrd */
env->gpr[4] = env->gpr[5] = 0;
@@ -751,17 +762,17 @@ void PPC_init_hw (/*CPUPPCState *env,*/
* The BSS starts after the kernel end.
*/
#if 0
- p = (void *)(((uint32_t)phys_ram_base + kernel_addr +
- kernel_size + (1 << 20) - 1) & ~((1 << 20) - 1));
+ p = (phys_ram_base + kernel_addr +
+ kernel_size + (1 << 20) - 1) & ~((1 << 20) - 1);
#else
- p = (void *)((uint32_t)phys_ram_base + kernel_addr + 0x400000);
+ p = phys_ram_base + kernel_addr + 0x400000;
#endif
if (loglevel > 0) {
- fprintf(logfile, "bootinfos: %p 0x%08x\n",
- p, (uint32_t)p - (uint32_t)phys_ram_base);
+ fprintf(logfile, "bootinfos: %p 0x%08lx\n",
+ p, (void *)p - (void *)phys_ram_base);
} else {
- printf("bootinfos: %p 0x%08x\n",
- p, (uint32_t)p - (uint32_t)phys_ram_base);
+ printf("bootinfos: %p 0x%08lx\n",
+ p, (void *)p - (void *)phys_ram_base);
}
/* Command line: let's put it after bootinfos */
#if 0
@@ -774,7 +785,7 @@ void PPC_init_hw (/*CPUPPCState *env,*/
boot_devs[boot_device - 'a'].name,
mem_size >> 20);
#endif
- env->gpr[6] = (uint32_t)p + 0x1000 - (uint32_t)phys_ram_base;
+ env->gpr[6] = (void *)p + 0x1000 - (void *)phys_ram_base;
env->gpr[7] = env->gpr[6] + strlen(p + 0x1000);
if (loglevel > 0) {
fprintf(logfile, "cmdline: %p 0x%08x [%s]\n",
@@ -787,7 +798,7 @@ void PPC_init_hw (/*CPUPPCState *env,*/
p = set_bootinfo_tag(p, 0x1010, 0, 0);
/* BI_CMD_LINE */
p = set_bootinfo_tag(p, 0x1012, env->gpr[7] - env->gpr[6],
- (void *)(env->gpr[6] + (uint32_t)phys_ram_base));
+ env->gpr[6] + phys_ram_base);
/* BI_MEM_SIZE */
tmp = (void *)tmpi;
tmp[0] = (mem_size >> 24) & 0xFF;
@@ -814,9 +825,8 @@ void PPC_init_hw (/*CPUPPCState *env,*/
*/
setup_BAT(env, 0, 0x01000000, kernel_addr, 0x00400000, 1, 0, 2);
{
-#if 0
- uint32_t offset =
- *((uint32_t *)((uint32_t)phys_ram_base + kernel_addr));
+#if 1
+ uint32_t offset = get_le32(phys_ram_base + kernel_addr);
#else
uint32_t offset = 12;
#endif
@@ -824,7 +834,7 @@ void PPC_init_hw (/*CPUPPCState *env,*/
printf("Start address: 0x%08x\n", env->nip);
}
env->gpr[1] = env->nip + (1 << 22);
- p = (void *)(phys_ram_base + stack_addr);
+ p = phys_ram_base + stack_addr;
put_long(p - 32, stack_addr);
env->gpr[1] -= 32;
printf("Kernel starts at 0x%08x stack 0x%08x\n", env->nip, env->gpr[1]);
@@ -835,7 +845,7 @@ void PPC_init_hw (/*CPUPPCState *env,*/
/* Setup OF entry point */
{
char *p;
- p = (char *)phys_ram_base + mem_size - 131072;
+ p = phys_ram_base + mem_size - 131072;
/* Special opcode to call OF */
*p++ = 0x18; *p++ = 0x00; *p++ = 0x00; *p++ = 0x02;
/* blr */
@@ -861,10 +871,10 @@ void PPC_init_hw (/*CPUPPCState *env,*/
/* Command line: let's put it just over the stack */
#if 0
#if 0
- p = (void *)(((uint32_t)phys_ram_base + kernel_addr +
- kernel_size + (1 << 20) - 1) & ~((1 << 20) - 1));
+ p = (phys_ram_base + kernel_addr +
+ kernel_size + (1 << 20) - 1) & ~((1 << 20) - 1);
#else
- p = (void *)((uint32_t)phys_ram_base + kernel_addr + 0x400000);
+ p = phys_ram_base + kernel_addr + 0x400000;
#endif
#if 1
sprintf(p, "console=ttyS0,9600 root=%02x%02x mem=%dM",
Index: hw/vga.c
===================================================================
RCS file: /cvsroot/qemu/qemu/hw/vga.c,v
retrieving revision 1.20
diff -u -d -w -B -b -d -p -r1.20 vga.c
--- hw/vga.c 15 Apr 2004 22:35:16 -0000 1.20
+++ hw/vga.c 18 Apr 2004 15:21:39 -0000
@@ -641,7 +641,7 @@ static void vbe_ioport_write(void *opaqu
#endif
/* called for accesses between 0xa0000 and 0xc0000 */
-static uint32_t vga_mem_readb(uint32_t addr)
+static uint32_t vga_mem_readb(unsigned long addr)
{
VGAState *s = &vga_state;
int memory_map_mode, plane;
@@ -697,7 +697,7 @@ static uint32_t vga_mem_readb(uint32_t a
return ret;
}
-static uint32_t vga_mem_readw(uint32_t addr)
+static uint32_t vga_mem_readw(unsigned long addr)
{
uint32_t v;
v = vga_mem_readb(addr);
@@ -705,7 +705,7 @@ static uint32_t vga_mem_readw(uint32_t a
return v;
}
-static uint32_t vga_mem_readl(uint32_t addr)
+static uint32_t vga_mem_readl(unsigned long addr)
{
uint32_t v;
v = vga_mem_readb(addr);
@@ -716,7 +716,7 @@ static uint32_t vga_mem_readl(uint32_t a
}
/* called for accesses between 0xa0000 and 0xc0000 */
-static void vga_mem_writeb(uint32_t addr, uint32_t val, uint32_t vaddr)
+static void vga_mem_writeb(unsigned long addr, uint32_t val, target_ulong vaddr)
{
VGAState *s = &vga_state;
int memory_map_mode, plane, write_mode, b, func_select;
@@ -844,13 +844,13 @@ static void vga_mem_writeb(uint32_t addr
}
}
-static void vga_mem_writew(uint32_t addr, uint32_t val, uint32_t vaddr)
+static void vga_mem_writew(unsigned long addr, uint32_t val, target_ulong vaddr)
{
vga_mem_writeb(addr, val & 0xff, vaddr);
vga_mem_writeb(addr + 1, (val >> 8) & 0xff, vaddr);
}
-static void vga_mem_writel(uint32_t addr, uint32_t val, uint32_t vaddr)
+static void vga_mem_writel(unsigned long addr, uint32_t val, target_ulong vaddr)
{
vga_mem_writeb(addr, val & 0xff, vaddr);
vga_mem_writeb(addr + 1, (val >> 8) & 0xff, vaddr);
Index: target-ppc/exec.h
===================================================================
RCS file: /cvsroot/qemu/qemu/target-ppc/exec.h,v
retrieving revision 1.4
diff -u -d -w -B -b -d -p -r1.4 exec.h
--- target-ppc/exec.h 12 Apr 2004 20:39:29 -0000 1.4
+++ target-ppc/exec.h 18 Apr 2004 15:21:39 -0000
@@ -139,6 +139,8 @@ void do_sraw(void);
void do_fctiw (void);
void do_fctiwz (void);
+void do_fnmadds (void);
+void do_fnmsubs (void);
void do_fsqrt (void);
void do_fsqrts (void);
void do_fres (void);
Index: target-ppc/helper.c
===================================================================
RCS file: /cvsroot/qemu/qemu/target-ppc/helper.c,v
retrieving revision 1.8
diff -u -d -w -B -b -d -p -r1.8 helper.c
--- target-ppc/helper.c 12 Apr 2004 20:39:29 -0000 1.8
+++ target-ppc/helper.c 18 Apr 2004 15:21:39 -0000
@@ -178,8 +178,8 @@ static int find_pte (uint32_t *RPN, int
int ret = -1; /* No entry found */
for (i = 0; i < 8; i++) {
- pte0 = ldl_raw((void *)((uint32_t)phys_ram_base + base + (i * 8)));
- pte1 = ldl_raw((void *)((uint32_t)phys_ram_base + base + (i * 8) + 4));
+ pte0 = ldl_raw(phys_ram_base + base + (i * 8));
+ pte1 = ldl_raw(phys_ram_base + base + (i * 8) + 4);
#if defined (DEBUG_MMU)
if (loglevel > 0) {
fprintf(logfile, "Load pte from 0x%08x => 0x%08x 0x%08x "
@@ -269,8 +269,7 @@ static int find_pte (uint32_t *RPN, int
}
}
if (store) {
- stl_raw((void *)((uint32_t)phys_ram_base + base + (good * 8) + 4),
- keep);
+ stl_raw(phys_ram_base + base + (good * 8) + 4, keep);
}
}
@@ -724,13 +723,13 @@ void do_interrupt (CPUState *env)
switch (excp) {
case EXCP_OFCALL:
#if defined (USE_OPEN_FIRMWARE)
- env->gpr[3] = OF_client_entry((void *)env->gpr[3]);
+ env->gpr[3] = OF_client_entry(PTR(env->gpr[3]));
#endif
return;
case EXCP_RTASCALL:
#if defined (USE_OPEN_FIRMWARE)
printf("RTAS call !\n");
- env->gpr[3] = RTAS_entry((void *)env->gpr[3]);
+ env->gpr[3] = RTAS_entry(PTR(env->gpr[3]));
printf("RTAS call done\n");
#endif
return;
@@ -824,7 +823,7 @@ void do_interrupt (CPUState *env)
/* Store exception cause */
/* Get rS/rD and rA from faulting opcode */
env->spr[DSISR] |=
- (ldl_code((void *)(env->nip - 4)) & 0x03FF0000) >> 16;
+ (ldl_code(PTR(env->nip - 4)) & 0x03FF0000) >> 16;
/* data location address has been stored
* when the fault has been detected
*/
Index: target-ppc/op.c
===================================================================
RCS file: /cvsroot/qemu/qemu/target-ppc/op.c,v
retrieving revision 1.9
diff -u -d -w -B -b -d -p -r1.9 op.c
--- target-ppc/op.c 12 Apr 2004 20:39:29 -0000 1.9
+++ target-ppc/op.c 18 Apr 2004 15:21:39 -0000
@@ -18,7 +18,7 @@
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
-//#define DEBUG_OP
+#define DEBUG_OP
#include "config.h"
#include "exec.h"
@@ -1368,28 +1368,32 @@ PPC_OP(fmsubs)
/* fnmadd - fnmadd. - fnmadds - fnmadds. */
PPC_OP(fnmadd)
{
- FT0 = -((FT0 * FT1) + FT2);
+ FT0 *= FT1;
+ FT0 += FT2;
+ FT0 = -FT0;
RETURN();
}
/* fnmadds - fnmadds. */
PPC_OP(fnmadds)
{
- FTS0 = -((FTS0 * FTS1) + FTS2);
+ do_fnmadds();
RETURN();
}
/* fnmsub - fnmsub. */
PPC_OP(fnmsub)
{
- FT0 = -((FT0 * FT1) - FT2);
+ FT0 *= FT1;
+ FT0 -= FT2;
+ FT0 = -FT0;
RETURN();
}
/* fnmsubs - fnmsubs. */
PPC_OP(fnmsubs)
{
- FTS0 = -((FTS0 * FTS1) - FTS2);
+ do_fnmsubs();
RETURN();
}
Index: target-ppc/op_helper.c
===================================================================
RCS file: /cvsroot/qemu/qemu/target-ppc/op_helper.c,v
retrieving revision 1.4
diff -u -d -w -B -b -d -p -r1.4 op_helper.c
--- target-ppc/op_helper.c 12 Apr 2004 20:39:29 -0000 1.4
+++ target-ppc/op_helper.c 18 Apr 2004 15:21:39 -0000
@@ -267,6 +267,16 @@ void do_fctiwz (void)
fesetround(cround);
}
+void do_fnmadds (void)
+{
+ FTS0 = -((FTS0 * FTS1) + FTS2);
+}
+
+void do_fnmsubs (void)
+{
+ FTS0 = -((FTS0 * FTS1) - FTS2);
+}
+
void do_fsqrt (void)
{
FT0 = sqrt(FT0);
Index: target-ppc/op_helper_mem.h
===================================================================
RCS file: /cvsroot/qemu/qemu/target-ppc/op_helper_mem.h,v
retrieving revision 1.2
diff -u -d -w -B -b -d -p -r1.2 op_helper_mem.h
--- target-ppc/op_helper_mem.h 4 Jan 2004 23:26:24 -0000 1.2
+++ target-ppc/op_helper_mem.h 18 Apr 2004 15:21:39 -0000
@@ -8,14 +8,14 @@ void glue(do_lsw, MEMSUFFIX) (int dst)
__func__, T0, T1, dst);
}
for (; T1 > 3; T1 -= 4, T0 += 4) {
- ugpr(dst++) = glue(ldl, MEMSUFFIX)((void *)T0);
+ ugpr(dst++) = glue(ldl, MEMSUFFIX)(PTR(T0));
if (dst == 32)
dst = 0;
}
if (T1 > 0) {
tmp = 0;
for (sh = 24; T1 > 0; T1--, T0++, sh -= 8) {
- tmp |= glue(ldub, MEMSUFFIX)((void *)T0) << sh;
+ tmp |= glue(ldub, MEMSUFFIX)(PTR(T0)) << sh;
}
ugpr(dst) = tmp;
}
@@ -30,13 +30,13 @@ void glue(do_stsw, MEMSUFFIX) (int src)
__func__, T0, T1, src);
}
for (; T1 > 3; T1 -= 4, T0 += 4) {
- glue(stl, MEMSUFFIX)((void *)T0, ugpr(src++));
+ glue(stl, MEMSUFFIX)(PTR(T0), ugpr(src++));
if (src == 32)
src = 0;
}
if (T1 > 0) {
for (sh = 24; T1 > 0; T1--, T0++, sh -= 8)
- glue(stb, MEMSUFFIX)((void *)T0, (ugpr(src) >> sh) & 0xFF);
+ glue(stb, MEMSUFFIX)(PTR(T0), (ugpr(src) >> sh) & 0xFF);
}
}
Index: target-ppc/op_mem.h
===================================================================
RCS file: /cvsroot/qemu/qemu/target-ppc/op_mem.h,v
retrieving revision 1.4
diff -u -d -w -B -b -d -p -r1.4 op_mem.h
--- target-ppc/op_mem.h 21 Feb 2004 14:13:13 -0000 1.4
+++ target-ppc/op_mem.h 18 Apr 2004 15:21:39 -0000
@@ -32,14 +32,14 @@ static inline void glue(st32r, MEMSUFFIX
#define PPC_LD_OP(name, op) \
PPC_OP(glue(glue(l, name), MEMSUFFIX)) \
{ \
- T1 = glue(op, MEMSUFFIX)((void *)T0); \
+ T1 = glue(op, MEMSUFFIX)(PTR(T0)); \
RETURN(); \
}
#define PPC_ST_OP(name, op) \
PPC_OP(glue(glue(st, name), MEMSUFFIX)) \
{ \
- glue(op, MEMSUFFIX)((void *)T0, T1); \
+ glue(op, MEMSUFFIX)(PTR(T0), T1); \
RETURN(); \
}
@@ -65,7 +65,7 @@ PPC_OP(glue(lmw, MEMSUFFIX))
int dst = PARAM(1);
for (; dst < 32; dst++, T0 += 4) {
- ugpr(dst) = glue(ldl, MEMSUFFIX)((void *)T0);
+ ugpr(dst) = glue(ldl, MEMSUFFIX)(PTR(T0));
}
RETURN();
}
@@ -75,7 +75,7 @@ PPC_OP(glue(stmw, MEMSUFFIX))
int src = PARAM(1);
for (; src < 32; src++, T0 += 4) {
- glue(stl, MEMSUFFIX)((void *)T0, ugpr(src));
+ glue(stl, MEMSUFFIX)(PTR(T0), ugpr(src));
}
RETURN();
}
@@ -116,7 +116,7 @@ PPC_OP(glue(stsw, MEMSUFFIX))
#define PPC_STF_OP(name, op) \
PPC_OP(glue(glue(st, name), MEMSUFFIX)) \
{ \
- glue(op, MEMSUFFIX)((void *)T0, FT1); \
+ glue(op, MEMSUFFIX)(PTR(T0), FT1); \
RETURN(); \
}
@@ -127,7 +127,7 @@ PPC_STF_OP(fs, stfl);
#define PPC_LDF_OP(name, op) \
PPC_OP(glue(glue(l, name), MEMSUFFIX)) \
{ \
- FT1 = glue(op, MEMSUFFIX)((void *)T0); \
+ FT1 = glue(op, MEMSUFFIX)(PTR(T0)); \
RETURN(); \
}
@@ -141,7 +141,7 @@ PPC_OP(glue(lwarx, MEMSUFFIX))
do_queue_exception(EXCP_ALIGN);
do_process_exceptions();
} else {
- T1 = glue(ldl, MEMSUFFIX)((void *)T0);
+ T1 = glue(ldl, MEMSUFFIX)(PTR(T0));
regs->reserve = T0;
}
RETURN();
@@ -157,7 +157,7 @@ PPC_OP(glue(stwcx, MEMSUFFIX))
if (regs->reserve != T0) {
env->crf[0] = xer_ov;
} else {
- glue(stl, MEMSUFFIX)((void *)T0, T1);
+ glue(stl, MEMSUFFIX)(PTR(T0), T1);
env->crf[0] = xer_ov | 0x02;
}
}
@@ -167,27 +167,27 @@ PPC_OP(glue(stwcx, MEMSUFFIX))
PPC_OP(glue(dcbz, MEMSUFFIX))
{
- glue(stl, MEMSUFFIX)((void *)(T0 + 0x00), 0);
- glue(stl, MEMSUFFIX)((void *)(T0 + 0x04), 0);
- glue(stl, MEMSUFFIX)((void *)(T0 + 0x08), 0);
- glue(stl, MEMSUFFIX)((void *)(T0 + 0x0C), 0);
- glue(stl, MEMSUFFIX)((void *)(T0 + 0x10), 0);
- glue(stl, MEMSUFFIX)((void *)(T0 + 0x14), 0);
- glue(stl, MEMSUFFIX)((void *)(T0 + 0x18), 0);
- glue(stl, MEMSUFFIX)((void *)(T0 + 0x1C), 0);
+ glue(stl, MEMSUFFIX)(PTR(T0 + 0x00), 0);
+ glue(stl, MEMSUFFIX)(PTR(T0 + 0x04), 0);
+ glue(stl, MEMSUFFIX)(PTR(T0 + 0x08), 0);
+ glue(stl, MEMSUFFIX)(PTR(T0 + 0x0C), 0);
+ glue(stl, MEMSUFFIX)(PTR(T0 + 0x10), 0);
+ glue(stl, MEMSUFFIX)(PTR(T0 + 0x14), 0);
+ glue(stl, MEMSUFFIX)(PTR(T0 + 0x18), 0);
+ glue(stl, MEMSUFFIX)(PTR(T0 + 0x1C), 0);
RETURN();
}
/* External access */
PPC_OP(glue(eciwx, MEMSUFFIX))
{
- T1 = glue(ldl, MEMSUFFIX)((void *)T0);
+ T1 = glue(ldl, MEMSUFFIX)(PTR(T0));
RETURN();
}
PPC_OP(glue(ecowx, MEMSUFFIX))
{
- glue(stl, MEMSUFFIX)((void *)T0, T1);
+ glue(stl, MEMSUFFIX)(PTR(T0), T1);
RETURN();
}
Index: target-ppc/translate.c
===================================================================
RCS file: /cvsroot/qemu/qemu/target-ppc/translate.c,v
retrieving revision 1.10
diff -u -d -w -B -b -d -p -r1.10 translate.c
--- target-ppc/translate.c 12 Apr 2004 20:39:29 -0000 1.10
+++ target-ppc/translate.c 18 Apr 2004 15:21:39 -0000
@@ -127,7 +127,7 @@ static uint8_t spr_access[1024 / 2];
/* internal defines */
typedef struct DisasContext {
struct TranslationBlock *tb;
- uint32_t *nip;
+ uint32_t nip;
uint32_t opcode;
uint32_t exception;
/* Time base offset */
@@ -276,7 +276,7 @@ static inline uint32_t MASK (uint32_t st
}
#define GEN_OPCODE(name, op1, op2, op3, invl, _typ) \
-__attribute__ ((section(".opcodes"), unused)) \
+__attribute__ ((section(".opcodes"), unused, aligned (8) )) \
static opcode_t opc_##name = { \
.opc1 = op1, \
.opc2 = op2, \
@@ -289,7 +289,7 @@ static opcode_t opc_##name = {
}
#define GEN_OPCODE_MARK(name) \
-__attribute__ ((section(".opcodes"), unused)) \
+__attribute__ ((section(".opcodes"), unused, aligned (8) )) \
static opcode_t opc_##name = { \
.opc1 = 0xFF, \
.opc2 = 0xFF, \
@@ -1509,13 +1509,13 @@ GEN_HANDLER(b, 0x12, 0xFF, 0xFF, 0x00000
gen_op_update_tb(ctx->tb_offset);
gen_op_update_decr(ctx->decr_offset);
- gen_op_process_exceptions((uint32_t)ctx->nip - 4);
+ gen_op_process_exceptions(ctx->nip - 4);
if (AA(ctx->opcode) == 0)
- target = (uint32_t)ctx->nip + li - 4;
+ target = ctx->nip + li - 4;
else
target = li;
if (LK(ctx->opcode)) {
- gen_op_setlr((uint32_t)ctx->nip);
+ gen_op_setlr(ctx->nip);
}
gen_op_b((long)ctx->tb, target);
ctx->exception = EXCP_BRANCH;
@@ -1535,7 +1535,7 @@ static inline void gen_bcond(DisasContex
gen_op_update_tb(ctx->tb_offset);
gen_op_update_decr(ctx->decr_offset);
- gen_op_process_exceptions((uint32_t)ctx->nip - 4);
+ gen_op_process_exceptions(ctx->nip - 4);
if ((bo & 0x4) == 0)
gen_op_dec_ctr();
@@ -1543,7 +1543,7 @@ static inline void gen_bcond(DisasContex
case BCOND_IM:
li = s_ext16(BD(ctx->opcode));
if (AA(ctx->opcode) == 0) {
- target = (uint32_t)ctx->nip + li - 4;
+ target = ctx->nip + li - 4;
} else {
target = li;
}
@@ -1557,7 +1557,7 @@ static inline void gen_bcond(DisasContex
break;
}
if (LK(ctx->opcode)) {
- gen_op_setlr((uint32_t)ctx->nip);
+ gen_op_setlr(ctx->nip);
}
if (bo & 0x10) {
/* No CR condition */
@@ -1612,9 +1612,9 @@ static inline void gen_bcond(DisasContex
}
}
if (type == BCOND_IM) {
- gen_op_btest((long)ctx->tb, target, (uint32_t)ctx->nip);
+ gen_op_btest((long)ctx->tb, target, ctx->nip);
} else {
- gen_op_btest_T1((uint32_t)ctx->nip);
+ gen_op_btest_T1(ctx->nip);
}
no_test:
ctx->exception = EXCP_BRANCH;
@@ -2552,6 +2552,12 @@ static int register_dblind_insn (opc_han
static int register_insn (opc_handler_t **ppc_opcodes, opcode_t *insn)
{
+#if 0
+ if (loglevel > 0) {
+ fprintf(logfile, "register insn %02x %02x %02x %p\n", insn->opc1,
+ insn->opc2, insn->opc3, insn->handler.handler);
+ }
+#endif
if (insn->opc2 != 0xFF) {
if (insn->opc3 != 0xFF) {
if (register_dblind_insn(ppc_opcodes, insn->opc1, insn->opc2,
@@ -2865,7 +2871,13 @@ static int create_ppc_proc (opc_handler_
}
for (opc = &opc_start + 1; opc != &opc_end; opc++) {
- if ((opc->handler.type & flags) != 0)
+#if 0
+ if (loglevel > 0) {
+ printf("Register insn %p %08x %08x %08x\n", opc,
+ opc->handler.type, flags, opc->handler.type & flags);
+ }
+#endif
+ if ((opc->handler.type & flags) != 0) {
if (register_insn(ppc_opcodes, opc) < 0) {
printf("*** ERROR initializing PPC instruction "
"0x%02x 0x%02x 0x%02x\n", opc->opc1, opc->opc2,
@@ -2873,6 +2885,7 @@ static int create_ppc_proc (opc_handler_
return -1;
}
}
+ }
fix_opcode_tables(ppc_opcodes);
return 0;
@@ -2989,7 +3002,7 @@ int gen_intermediate_code_internal (CPUS
gen_opc_ptr = gen_opc_buf;
gen_opc_end = gen_opc_buf + OPC_MAX_SIZE;
gen_opparam_ptr = gen_opparam_buf;
- ctx.nip = (uint32_t *)pc_start;
+ ctx.nip = pc_start;
ctx.tb_offset = 0;
ctx.decr_offset = 0;
ctx.tb = tb;
@@ -3015,18 +3028,18 @@ int gen_intermediate_code_internal (CPUS
lj++;
while (lj < j)
gen_opc_instr_start[lj++] = 0;
- gen_opc_pc[lj] = (uint32_t)ctx.nip;
+ gen_opc_pc[lj] = ctx.nip;
gen_opc_instr_start[lj] = 1;
}
}
#if defined DEBUG_DISAS
if (loglevel > 0) {
fprintf(logfile, "----------------\n");
- fprintf(logfile, "nip=%p super=%d ir=%d\n",
+ fprintf(logfile, "nip=0x%08x super=%d ir=%d\n",
ctx.nip, 1 - msr_pr, msr_ir);
}
#endif
- ctx.opcode = ldl_code(ctx.nip);
+ ctx.opcode = ldl_code(PTR(ctx.nip));
#if defined DEBUG_DISAS
if (loglevel > 0) {
fprintf(logfile, "translate opcode %08x (%02x %02x %02x)\n",
@@ -3034,19 +3047,40 @@ int gen_intermediate_code_internal (CPUS
opc3(ctx.opcode));
}
#endif
- ctx.nip++;
+ ctx.nip += 4;
ctx.tb_offset++;
/* Check decrementer exception */
if (++ctx.decr_offset == env->decr + 1)
ctx.exception = EXCP_DECR;
table = ppc_opcodes;
handler = table[opc1(ctx.opcode)];
+#if 0
+ if (loglevel > 0) {
+ fprintf(logfile, "0: Found handler=%p %s %p %p %p\n", handler,
+ is_indirect_opcode(handler) ? "IND" : "DIR",
+ &invalid_handler, table[0], table);
+ }
+#endif
if (is_indirect_opcode(handler)) {
table = ind_table(handler);
handler = table[opc2(ctx.opcode)];
+#if 0
+ if (loglevel > 0) {
+ fprintf(logfile, "1: Found handler=%p %s %p\n", handler,
+ is_indirect_opcode(handler) ? "IND" : "DIR",
+ &invalid_handler);
+ }
+#endif
if (is_indirect_opcode(handler)) {
table = ind_table(handler);
handler = table[opc3(ctx.opcode)];
+#if 0
+ if (loglevel > 0) {
+ fprintf(logfile, "2: Found handler=%p %s %p\n", handler,
+ is_indirect_opcode(handler) ? "IND" : "DIR",
+ &invalid_handler);
+ }
+#endif
}
}
/* Is opcode *REALLY* valid ? */
@@ -3054,12 +3088,12 @@ int gen_intermediate_code_internal (CPUS
if (loglevel > 0) {
if (handler->handler == &gen_invalid) {
fprintf(logfile, "invalid/unsupported opcode: "
- "%02x -%02x - %02x (%08x) %p\n",
+ "%02x - %02x - %02x (%08x) 0x%08x\n",
opc1(ctx.opcode), opc2(ctx.opcode),
opc3(ctx.opcode), ctx.opcode, ctx.nip - 1);
} else {
fprintf(logfile, "invalid bits: %08x for opcode: "
- "%02x -%02x - %02x (0x%08x) (%p)\n",
+ "%02x - %02x - %02x (0x%08x) (0x%08x)\n",
ctx.opcode & handler->inval, opc1(ctx.opcode),
opc2(ctx.opcode), opc3(ctx.opcode),
ctx.opcode, ctx.nip - 1);
@@ -3067,12 +3101,12 @@ int gen_intermediate_code_internal (CPUS
} else {
if (handler->handler == &gen_invalid) {
printf("invalid/unsupported opcode: "
- "%02x -%02x - %02x (%08x) %p\n",
+ "%02x - %02x - %02x (%08x) 0x%08x\n",
opc1(ctx.opcode), opc2(ctx.opcode),
opc3(ctx.opcode), ctx.opcode, ctx.nip - 1);
} else {
printf("invalid bits: %08x for opcode: "
- "%02x -%02x - %02x (0x%08x) (%p)\n",
+ "%02x - %02x - %02x (0x%08x) (0x%08x)\n",
ctx.opcode & handler->inval, opc1(ctx.opcode),
opc2(ctx.opcode), opc3(ctx.opcode),
ctx.opcode, ctx.nip - 1);
@@ -3089,9 +3123,9 @@ int gen_intermediate_code_internal (CPUS
* - rfi, trap or syscall
* - first instruction of an exception handler
*/
- (msr_se && ((uint32_t)ctx.nip < 0x100 ||
- (uint32_t)ctx.nip > 0xF00 ||
- ((uint32_t)ctx.nip & 0xFC) != 0x04) &&
+ (msr_se && (ctx.nip < 0x100 ||
+ ctx.nip > 0xF00 ||
+ (ctx.nip & 0xFC) != 0x04) &&
ctx.exception != EXCP_SYSCALL && ctx.exception != EXCP_RFI &&
ctx.exception != EXCP_TRAP)) {
#if !defined(CONFIG_USER_ONLY)
@@ -3102,9 +3136,9 @@ int gen_intermediate_code_internal (CPUS
}
}
/* if we reach a page boundary, stop generation */
- if (((uint32_t)ctx.nip & (TARGET_PAGE_SIZE - 1)) == 0) {
+ if ((ctx.nip & (TARGET_PAGE_SIZE - 1)) == 0) {
if (ctx.exception == EXCP_NONE) {
- gen_op_b((long)ctx.tb, (uint32_t)ctx.nip);
+ gen_op_b((unsigned long)ctx.tb, ctx.nip);
ctx.exception = EXCP_BRANCH;
}
}
@@ -3113,7 +3147,7 @@ int gen_intermediate_code_internal (CPUS
if (ctx.exception != EXCP_BRANCH && ctx.exception != EXCP_RFI) {
gen_op_update_tb(ctx.tb_offset);
gen_op_update_decr(ctx.decr_offset);
- gen_op_process_exceptions((uint32_t)ctx.nip);
+ gen_op_process_exceptions(ctx.nip);
}
#if 1
/* TO BE FIXED: T0 hasn't got a proper value, which makes tb_add_jump
@@ -3136,15 +3170,15 @@ int gen_intermediate_code_internal (CPUS
}
#endif
} else {
- tb->size = (uint32_t)ctx.nip - pc_start;
+ tb->size = ctx.nip - pc_start;
}
env->access_type = ACCESS_INT;
#ifdef DEBUG_DISAS
if (loglevel > 0) {
fprintf(logfile, "---------------- excp: %04x\n", ctx.exception);
cpu_ppc_dump_state(env, logfile, 0);
- fprintf(logfile, "IN: %s\n", lookup_symbol((void *)pc_start));
- disas(logfile, (void *)pc_start, (uint32_t)ctx.nip - pc_start, 0, 0);
+ fprintf(logfile, "IN: %s\n", lookup_symbol(PTR(pc_start)));
+ disas(logfile, PTR(pc_start), ctx.nip - pc_start, 0, 0);
fprintf(logfile, "\n");
fprintf(logfile, "OP:\n");
[-- Attachment #3: ticks.diff --]
[-- Type: text/x-patch, Size: 1 bytes --]
[-- Attachment #4: vga.c.diff --]
[-- Type: text/x-patch, Size: 572 bytes --]
Index: hw/vga.c
===================================================================
RCS file: /cvsroot/qemu/qemu/hw/vga.c,v
retrieving revision 1.20
diff -u -d -w -B -b -d -p -r1.20 vga.c
--- hw/vga.c 15 Apr 2004 22:35:16 -0000 1.20
+++ hw/vga.c 25 Apr 2004 15:51:10 -0000
@@ -91,7 +91,7 @@ typedef struct VGAState {
uint8_t dac_write_index;
uint8_t dac_cache[3]; /* used when writing */
uint8_t palette[768];
- uint32_t bank_offset;
+ int32_t bank_offset;
#ifdef CONFIG_BOCHS_VBE
uint16_t vbe_index;
uint16_t vbe_regs[VBE_DISPI_INDEX_NB];
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [Qemu-devel] amd64 compile
2004-04-25 16:07 ` J. Mayer
@ 2004-04-25 16:23 ` Martin Garton
2004-04-25 18:20 ` J. Mayer
2004-04-25 17:46 ` [Qemu-devel] " Gabriel Ebner
1 sibling, 1 reply; 11+ messages in thread
From: Martin Garton @ 2004-04-25 16:23 UTC (permalink / raw)
To: J. Mayer; +Cc: qemu-devel
On Sun, 25 Apr 2004, J. Mayer wrote:
> Your patch is incorrect:
> - don't remove the -Wall: the warnings you can see are mostly bugs due
> to the fact that qemu assumes that unsigned long is 32 bits long.
Sorry - That was for my testing. I didn't mean to include that in the
patch.
I wasn't attempting to fix those warnings/bugs yet.
Do you think a solution to the problem on hosts where sizeof(void *) !=
sizeof(int) could be best solved by macros such as pointer_to_int() and
int_to_pointer() which did whatever is appropriate for that host?
Of course it depends how its being used, I don't know enough about the
code to tell whether its storing int values in pointers (which would be
fine and could be handled by a macro) or vice versa (which obviously
wouldnt)
> - the correct cpu_get_real_ticks patch has already been posted by art
> yerkes some times ago. I also re-send it as a reminder.
okay.
> - to compile qemu usermode emulation, you need to edit the amd64.ld
> file, which is duplicated. Remove half of the file, and the link won't
> fail.
Thanks for the info.
Regards,
Martin.
^ permalink raw reply [flat|nested] 11+ messages in thread
* [Qemu-devel] Re: amd64 compile
2004-04-25 16:07 ` J. Mayer
2004-04-25 16:23 ` Martin Garton
@ 2004-04-25 17:46 ` Gabriel Ebner
2004-04-25 18:09 ` J. Mayer
1 sibling, 1 reply; 11+ messages in thread
From: Gabriel Ebner @ 2004-04-25 17:46 UTC (permalink / raw)
To: qemu-devel
Hello,
J. Mayer wrote:
> - the correct cpu_get_real_ticks patch has already been posted by art
> yerkes some times ago. I also re-send it as a reminder.
Sorry, but grepping through amd64.diff returns nothing and compiling
i386-softmmu on amd64 with your patch gives an error about said function.
And I couldn't find that patch in the archives either.
Gabriel.
--
Gabriel Ebner - reverse "ta.renbeleirbag@eg"
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [Qemu-devel] Re: amd64 compile
2004-04-25 17:46 ` [Qemu-devel] " Gabriel Ebner
@ 2004-04-25 18:09 ` J. Mayer
2004-04-25 18:38 ` [Qemu-devel] " Gabriel Ebner
0 siblings, 1 reply; 11+ messages in thread
From: J. Mayer @ 2004-04-25 18:09 UTC (permalink / raw)
To: qemu-devel
On Sun, 2004-04-25 at 19:46, Gabriel Ebner wrote:
> Hello,
>
> J. Mayer wrote:
> > - the correct cpu_get_real_ticks patch has already been posted by art
> > yerkes some times ago. I also re-send it as a reminder.
>
> Sorry, but grepping through amd64.diff returns nothing and compiling
> i386-softmmu on amd64 with your patch gives an error about said function.
I added 3 attachements to my message. The one concerning
cpu_get_real_ticks is named ticks.diff
> And I couldn't find that patch in the archives either.
Here are the references of the original message:
Date: Mon, 19 Apr 2004 14:23:11 -0500
From: art yerkes <ayerkes at speakeasy dot net>
To: jm at poure dot com
Cc:
qemu-devel at nongnu dot org
Subject: Re: [Qemu-devel] QEMU 0.5.3 release
Message-Id: <20040419142311.3a2ccb10 dot ayerkes at speakeasy dot net>
In-Reply-To: <200404191642.40960 dot jm at poure dot com>
--
J. Mayer <l_indien@magic.fr>
Never organized
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [Qemu-devel] amd64 compile
2004-04-25 16:23 ` Martin Garton
@ 2004-04-25 18:20 ` J. Mayer
2004-04-25 18:40 ` J. Mayer
0 siblings, 1 reply; 11+ messages in thread
From: J. Mayer @ 2004-04-25 18:20 UTC (permalink / raw)
To: qemu-devel
[-- Attachment #1: Type: text/plain, Size: 1751 bytes --]
On Sun, 2004-04-25 at 18:23, Martin Garton wrote:
> On Sun, 25 Apr 2004, J. Mayer wrote:
>
> > Your patch is incorrect:
> > - don't remove the -Wall: the warnings you can see are mostly bugs
due
> > to the fact that qemu assumes that unsigned long is 32 bits long.
>
> Sorry - That was for my testing. I didn't mean to include that in the
> patch.
Don't have to be sorry, IMHO, all tries can bring good ideas :-)
> I wasn't attempting to fix those warnings/bugs yet.
>
> Do you think a solution to the problem on hosts where sizeof(void *)
!=
> sizeof(int) could be best solved by macros such as pointer_to_int()
and
> int_to_pointer() which did whatever is appropriate for that host?
>
> Of course it depends how its being used, I don't know enough about the
> code to tell whether its storing int values in pointers (which would
be
> fine and could be handled by a macro) or vice versa (which obviously
> wouldnt)
Fabrice pointed out that it's quite more complicated. This approach
would solve the case where host_ulong is 64 bits and target_ulong is 32
bits. But we still could not be able to emulate a 64 bits machine on a
32 bits host.
> > - to compile qemu usermode emulation, you need to edit the amd64.ld
> > file, which is duplicated. Remove half of the file, and the link
won't
> > fail.
Here's another patch that makes me able to launch PPC programs on my
amd64 and may be able to fix usermode emulation for all 64 bits hosts.
The bug was that the host mmap start address always remained the same
when requested address is NULL,
which makes mmap to be remapped elsewhere, above 4GB, on my machine.
And another patch is there to fix use of debug flags with usermode
emulation.
--
J. Mayer <l_indien@magic.fr>
Never organized
[-- Attachment #2: mmap.c.diff --]
[-- Type: text/x-patch, Size: 1233 bytes --]
Index: linux-user/mmap.c
===================================================================
RCS file: /cvsroot/qemu/qemu/linux-user/mmap.c,v
retrieving revision 1.5
diff -u -d -w -B -b -d -p -r1.5 mmap.c
--- linux-user/mmap.c 17 Mar 2004 23:46:04 -0000 1.5
+++ linux-user/mmap.c 25 Apr 2004 17:16:26 -0000
@@ -152,6 +152,9 @@ long target_mmap(unsigned long start, un
int flags, int fd, unsigned long offset)
{
unsigned long ret, end, host_start, host_end, retaddr, host_offset, host_len;
+#if defined(__alpha__) || defined(__sparc__) || defined(__x86_64__)
+ static unsigned long last_start = 0x40000000;
+#endif
#ifdef DEBUG_MMAP
{
@@ -190,8 +193,10 @@ long target_mmap(unsigned long start, un
if (!(flags & MAP_FIXED)) {
#if defined(__alpha__) || defined(__sparc__) || defined(__x86_64__)
/* tell the kenel to search at the same place as i386 */
- if (host_start == 0)
- host_start = 0x40000000;
+ if (host_start == 0) {
+ host_start = last_start;
+ last_start += HOST_PAGE_ALIGN(len);
+ }
#endif
if (host_page_size != real_host_page_size) {
/* NOTE: this code is only for debugging with '-p' option */
[-- Attachment #3: main.c.diff --]
[-- Type: text/x-patch, Size: 730 bytes --]
Index: linux-user/main.c
===================================================================
RCS file: /cvsroot/qemu/qemu/linux-user/main.c,v
retrieving revision 1.47
diff -u -d -w -B -b -d -p -r1.47 main.c
--- linux-user/main.c 12 Apr 2004 20:39:29 -0000 1.47
+++ linux-user/main.c 25 Apr 2004 17:30:32 -0000
@@ -850,8 +845,7 @@ int main(int argc, char **argv)
} else if (!strcmp(r, "d")) {
int mask;
CPULogItem *item;
-
- mask = cpu_str_to_log_mask(optarg);
+ mask = cpu_str_to_log_mask(argv[optind++]);
if (!mask) {
printf("Log items (comma separated):\n");
for(item = cpu_log_items; item->mask != 0; item++) {
^ permalink raw reply [flat|nested] 11+ messages in thread
* [Qemu-devel] Re: Re: amd64 compile
2004-04-25 18:09 ` J. Mayer
@ 2004-04-25 18:38 ` Gabriel Ebner
2004-04-25 18:52 ` J. Mayer
0 siblings, 1 reply; 11+ messages in thread
From: Gabriel Ebner @ 2004-04-25 18:38 UTC (permalink / raw)
To: qemu-devel
Hello,
J. Mayer wrote:
> I added 3 attachements to my message. The one concerning
> cpu_get_real_ticks is named ticks.diff
That one's empty.
>> And I couldn't find that patch in the archives either.
>
> Here are the references of the original message:
> Date: Mon, 19 Apr 2004 14:23:11 -0500
Sorry, the archives appear not to search attachments...
Gabriel.
--
Gabriel Ebner - reverse "ta.renbeleirbag@eg"
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [Qemu-devel] amd64 compile
2004-04-25 18:20 ` J. Mayer
@ 2004-04-25 18:40 ` J. Mayer
2004-04-25 19:02 ` Fabrice Bellard
0 siblings, 1 reply; 11+ messages in thread
From: J. Mayer @ 2004-04-25 18:40 UTC (permalink / raw)
To: qemu-devel
[-- Attachment #1: Type: text/plain, Size: 195 bytes --]
... yet another amd64 fix:
this one makes PPC binutils run fine on my amd64. 64 bits endianness
fix...
There may be more of this kind of bugs...
--
J. Mayer <l_indien@magic.fr>
Never organized
[-- Attachment #2: syscall.c.diff --]
[-- Type: text/x-patch, Size: 772 bytes --]
Index: linux-user/syscall.c
===================================================================
RCS file: /cvsroot/qemu/qemu/linux-user/syscall.c,v
retrieving revision 1.47
diff -u -d -w -B -b -d -p -r1.47 syscall.c
--- linux-user/syscall.c 12 Apr 2004 20:39:29 -0000 1.47
+++ linux-user/syscall.c 25 Apr 2004 18:31:36 -0000
@@ -2403,7 +2403,12 @@ long do_syscall(void *cpu_env, int num,
case TARGET_NR__llseek:
{
int64_t res;
+#if defined (__x86_64__)
+ /* XXX: may be needed by other 64 bits targets ? */
+ ret = get_errno(_llseek(arg1, arg3, arg2, &res, arg5));
+#else
ret = get_errno(_llseek(arg1, arg2, arg3, &res, arg5));
+#endif
*(int64_t *)arg4 = tswap64(res);
}
break;
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [Qemu-devel] Re: Re: amd64 compile
2004-04-25 18:38 ` [Qemu-devel] " Gabriel Ebner
@ 2004-04-25 18:52 ` J. Mayer
0 siblings, 0 replies; 11+ messages in thread
From: J. Mayer @ 2004-04-25 18:52 UTC (permalink / raw)
To: qemu-devel
[-- Attachment #1: Type: text/plain, Size: 319 bytes --]
On Sun, 2004-04-25 at 20:38, Gabriel Ebner wrote:
> Hello,
>
> J. Mayer wrote:
> > I added 3 attachements to my message. The one concerning
> > cpu_get_real_ticks is named ticks.diff
>
> That one's empty
Oops, you're aboslutely right, I'm sorry... Here it is again.
--
J. Mayer <l_indien@magic.fr>
Never organized
[-- Attachment #2: ticks.diff --]
[-- Type: text/x-patch, Size: 574 bytes --]
Index: vl.c
===================================================================
RCS file: /cvsroot/qemu/qemu/vl.c,v
retrieving revision 1.59
diff -u -r1.59 vl.c
--- vl.c 12 Apr 2004 20:39:28 -0000 1.59
+++ vl.c 19 Apr 2004 13:04:29 -0000
@@ -358,7 +358,20 @@
return val;
}
+#elif defined(__x86_64__)
+
+int64_t cpu_get_real_ticks(void)
+{
+ uint32_t low,high;
+ int64_t val;
+ asm volatile("rdtsc" : "=a" (low), "=d" (high));
+ val = high;
+ val <<= 32;
+ val |= low;
+ return val;
+}
+
#else
#error unsupported CPU
#endif
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [Qemu-devel] amd64 compile
2004-04-25 18:40 ` J. Mayer
@ 2004-04-25 19:02 ` Fabrice Bellard
2004-04-25 19:46 ` J. Mayer
0 siblings, 1 reply; 11+ messages in thread
From: Fabrice Bellard @ 2004-04-25 19:02 UTC (permalink / raw)
To: qemu-devel
From the kernel sources, _llseek is handled the same on every arch
(linux/fs/read_write.c). So there must be another problem.
Fabrice.
J. Mayer wrote:
> ... yet another amd64 fix:
> this one makes PPC binutils run fine on my amd64. 64 bits endianness
> fix...
> There may be more of this kind of bugs...
>
>
>
> ------------------------------------------------------------------------
>
> Index: linux-user/syscall.c
> ===================================================================
> RCS file: /cvsroot/qemu/qemu/linux-user/syscall.c,v
> retrieving revision 1.47
> diff -u -d -w -B -b -d -p -r1.47 syscall.c
> --- linux-user/syscall.c 12 Apr 2004 20:39:29 -0000 1.47
> +++ linux-user/syscall.c 25 Apr 2004 18:31:36 -0000
> @@ -2403,7 +2403,12 @@ long do_syscall(void *cpu_env, int num,
> case TARGET_NR__llseek:
> {
> int64_t res;
> +#if defined (__x86_64__)
> + /* XXX: may be needed by other 64 bits targets ? */
> + ret = get_errno(_llseek(arg1, arg3, arg2, &res, arg5));
> +#else
> ret = get_errno(_llseek(arg1, arg2, arg3, &res, arg5));
> +#endif
> *(int64_t *)arg4 = tswap64(res);
> }
> break;
^ permalink raw reply [flat|nested] 11+ messages in thread
* Re: [Qemu-devel] amd64 compile
2004-04-25 19:02 ` Fabrice Bellard
@ 2004-04-25 19:46 ` J. Mayer
0 siblings, 0 replies; 11+ messages in thread
From: J. Mayer @ 2004-04-25 19:46 UTC (permalink / raw)
To: qemu-devel
On Sun, 2004-04-25 at 21:02, Fabrice Bellard wrote:
> From the kernel sources, _llseek is handled the same on every arch
> (linux/fs/read_write.c). So there must be another problem.
Oh well, you're right. I absolutely wanted to use llseek, and I didn't
noticed the way it's defined in syscall.c, which is buggy, at least for
amd64.
lseek is 3 args for amd64, not 5 and there is no llseek syscall at all.
This patch gets it right:
Index: linux-user/syscall.c
===================================================================
RCS file: /cvsroot/qemu/qemu/linux-user/syscall.c,v
retrieving revision 1.47
diff -u -d -w -B -b -d -p -r1.47 syscall.c
--- linux-user/syscall.c 12 Apr 2004 20:39:29 -0000 1.47
+++ linux-user/syscall.c 25 Apr 2004 19:39:10 -0000
@@ -2402,9 +2402,14 @@ long do_syscall(void *cpu_env, int num,
goto unimplemented;
case TARGET_NR__llseek:
{
+#if defined (__x86_64__)
+ ret = get_errno(lseek(arg1, ((uint64_t )arg2 << 32) | arg3,
arg5));
+ *(int64_t *)arg4 = ret;
+#else
int64_t res;
ret = get_errno(_llseek(arg1, arg2, arg3, &res, arg5));
*(int64_t *)arg4 = tswap64(res);
+#endif
}
break;
case TARGET_NR_getdents:
--
J. Mayer <l_indien@magic.fr>
Never organized
^ permalink raw reply [flat|nested] 11+ messages in thread
end of thread, other threads:[~2004-04-25 19:42 UTC | newest]
Thread overview: 11+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2004-04-25 15:32 [Qemu-devel] amd64 compile Martin Garton
2004-04-25 16:07 ` J. Mayer
2004-04-25 16:23 ` Martin Garton
2004-04-25 18:20 ` J. Mayer
2004-04-25 18:40 ` J. Mayer
2004-04-25 19:02 ` Fabrice Bellard
2004-04-25 19:46 ` J. Mayer
2004-04-25 17:46 ` [Qemu-devel] " Gabriel Ebner
2004-04-25 18:09 ` J. Mayer
2004-04-25 18:38 ` [Qemu-devel] " Gabriel Ebner
2004-04-25 18:52 ` J. Mayer
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