From: Vince Weaver <vince@csl.cornell.edu>
To: "Boris Cámara" <vesmar@rocketmail.com>
Cc: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] full dynamic instruction trace for MIPS target
Date: Mon, 5 Apr 2010 21:41:52 -0400 (EDT) [thread overview]
Message-ID: <Pine.LNX.4.61.1004052137390.18868@cluizel.csl.cornell.edu> (raw)
In-Reply-To: <639622.90232.qm@web43140.mail.sp1.yahoo.com>
> I think the correct way to get the full instruction trace on a MIPS
> emulated processor is:
the way you describe is slow because you are constantly re-generating the
TBs. The best way to do this is to add your instrumentation to the TBs.
I have code that does that for a recent version of Qemu here:
http://www.csl.cornell.edu/~vince/projects/qemusim/
although it outputs Basic-Block vectors, not a full memory trace like you
want. It has been validated to match proper instruction counts using
hardware performnce counters though.
I also have code creating full instruction/memory traces for Qemu MIPS
that can be found here:
http://www.csl.cornell.edu/~vince/projects/qemu-trace/
but it's against Qemu from 2007 pre-dating the TCG changeover so of
limited use probably. I hvae some code somewhere that updated this to
work with TCG but I don't know what happened to it.
Vince
next prev parent reply other threads:[~2010-04-06 1:42 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-04-05 22:09 [Qemu-devel] full dynamic instruction trace for MIPS target Boris Cámara
2010-04-05 22:41 ` Richard Henderson
2010-04-05 23:24 ` Res: " Boris Cámara
2010-04-06 1:41 ` Vince Weaver [this message]
2010-04-06 23:18 ` Boris Cámara
2010-04-07 2:33 ` Vince Weaver
2010-04-07 16:42 ` Res: " Boris Cámara
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