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From: Vince Weaver <vince@csl.cornell.edu>
To: "Boris Cámara" <vesmar@rocketmail.com>
Cc: qemu-devel@nongnu.org
Subject: Re: Res: [Qemu-devel] full dynamic instruction trace for MIPS target
Date: Tue, 6 Apr 2010 22:33:57 -0400 (EDT)	[thread overview]
Message-ID: <Pine.LNX.4.61.1004062231040.13414@cluizel.csl.cornell.edu> (raw)
In-Reply-To: <744151.25169.qm@web43135.mail.sp1.yahoo.com>

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On Tue, 6 Apr 2010, Boris Cámara wrote:

>The aproach you are using on 
>http://www.csl.cornell.edu/~vince/projects/qemu-trace/ to get the PC dump 
>is similar to mine but as you dont disable the TB caches It is not a full 
>execution trace. 

I can assure you that it does in fact work.

> You only dump the PC when they are compiled and inserted 
> on the TB cache.

no, look closer.  My code at instrumentation time inserts a helper-op 
after each instruction.  This is like a virtual instruction that lives in 
the TB and calls my counting function.  So each time the TB is re-executed 
the calls happen again, as they are part of the TB instruction stream.

> Did you get correct values for your counters in bbvs[bb] ?

yes.  And the resuts match valgrind, pin, and hardware performance 
counters.

Vince



________________________________
De: Vince Weaver <vince@csl.cornell.edu>
Para: Boris Cámara <vesmar@rocketmail.com>
Cc: qemu-devel@nongnu.org
Enviadas: Segunda-feira, 5 de Abril de 2010 22:41:52
Assunto: Re: [Qemu-devel] full dynamic instruction trace for MIPS target


> I think the correct way to get the full instruction trace on a MIPS 
> emulated processor is:

the way you describe is slow because you are constantly re-generating the 
TBs.  The best way to do this is to add your instrumentation to the TBs.

I have code that does that for a recent version of Qemu here:
  http://www.csl.cornell.edu/~vince/projects/qemusim/

although it outputs Basic-Block vectors, not a full memory trace like you 
want.  It has been validated to match proper instruction counts using 
hardware performnce counters though.

I also have code creating full instruction/memory traces for Qemu MIPS 
that can be found here:
  http://www.csl.cornell.edu/~vince/projects/qemu-trace/

but it's against Qemu from 2007 pre-dating the TCG changeover so of 
limited use probably.  I hvae some code somewhere that updated this to 
work with TCG but I don't know what happened to it.

Vince


      ____________________________________________________________________________________
Veja quais são os assuntos do momento no Yahoo! +Buscados
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-- 
/*  Vince Weaver  vince@csl.cornell.edu  http://csl.cornell.edu/~vince  */

main(){char O,o[66]="|\n\\/_  ",*I=o+7,l[]="B!FhhBHCWE9C?cJFKET$+h'Iq*chT"
,i=0,_;while(_=l[i++])for(O=0;O++<_>>5;)*I=*(I++-(_&31));*I=0;puts(o+5);}

  reply	other threads:[~2010-04-07  2:34 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-04-05 22:09 [Qemu-devel] full dynamic instruction trace for MIPS target Boris Cámara
2010-04-05 22:41 ` Richard Henderson
2010-04-05 23:24   ` Res: " Boris Cámara
2010-04-06  1:41 ` Vince Weaver
2010-04-06 23:18   ` Res: " Boris Cámara
2010-04-07  2:33     ` Vince Weaver [this message]
2010-04-07 16:42       ` Res: " Boris Cámara

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