Re: [Qemu-devel] Re: PATCH, RFC: Generic DMA framework

[malc <av1474@comtv.ru>]

On Thu, 16 Aug 2007, Blue Swirl wrote:

> On 8/14/07, Blue Swirl <blauwirbel@gmail.com> wrote:
>> Would the framework need any changes to support other targets? Comments welcome.
>
> Replying to myself: Yes, changes may be needed. Some of the DMA
> controllers move the data outside CPU loop, but that does not make
> much difference.
>
> Background: I want to use the framework for at least devices that
> Sparc32/64 use. For Sparc32 the reason is that on Sun4c (Sparcstation
> 1, 2, IPX etc.) there is no IOMMU, but instead the CPU MMU is used for
> address translation. The DMA framework makes it possible to remove the
> IOMMU without changing the devices.
>
> On Sparc64 an IOMMU needs to be inserted between PCI devices and RAM
> without disturbing other targets.
>
> About the devices: Users of PC ISA DMA controller (SB16, FDC) pass the
> DMA position parameter to controller. I'm not sure this can be removed
> easily. Of course a real DMA controller does not get any position data
> from target. For Sparc32/64 I would not need to touch the PC ISA DMA
> devices, except maybe for FDC. On Sparc32, the FDC DMA is not even
> used. I have to think about this part.

Very long time ago i changed the ISA DMA API to address some of the
critique that Fabrice expressed, i can't remember offhand if that
included removal of explicit position passing or not (the patch is on
some off-line HDD so it's not easy to check whether it's in fact so)

http://www.mail-archive.com/qemu-devel@nongnu.org/msg06594.html

If needed i can try to locate the patch but the FDC problem still needs
to be addressed by someone.

> PCI DMA-like devices (eepro100, pcnet, rtl8139, ide) as well as PXA
> use cpu_physical_memory_rw to transfer data (eepro100 also uses
> ldl_phys, which looks very suspicious). These could be converted to
> generic DMA easily.
>
> OMAP DMA is strange, but fortunately I'm not interested in those devices.
>
>

-- 
vale