[Qemu-devel] [4705] Fix div[u]2.

[Qemu-devel] [4705] Fix div[u]2.

[malc]

Revision: 4705
          http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=4705
Author:   malc
Date:     2008-06-09 06:06:25 +0000 (Mon, 09 Jun 2008)

Log Message:
-----------
Fix div[u]2.

Previous code assummed 32 by 32 bit divmod operation, and survived
x86_64 test only by sheer luck. MIPS wasn't so forgiving.

Modified Paths:
--------------
    trunk/tcg/ppc/tcg-target.c

Modified: trunk/tcg/ppc/tcg-target.c
===================================================================
--- trunk/tcg/ppc/tcg-target.c	2008-06-09 00:20:13 UTC (rev 4704)
+++ trunk/tcg/ppc/tcg-target.c	2008-06-09 06:06:25 UTC (rev 4705)
@@ -198,6 +198,10 @@
 
     ct_str = *pct_str;
     switch (ct_str[0]) {
+    case 'A': case 'B': case 'C': case 'D':
+        ct->ct |= TCG_CT_REG;
+        tcg_regset_set_reg(ct->u.regs, 3 + ct_str[0] - 'A');
+        break;
     case 'r':
         ct->ct |= TCG_CT_REG;
         tcg_regset_set32(ct->u.regs, 0, 0xffffffff);
@@ -1014,6 +1018,63 @@
     tcg_out_label(s, label_next, (tcg_target_long)s->code_ptr);
 }
 
+static uint64_t __attribute ((used)) ppc_udiv_helper (uint64_t a, uint32_t b)
+{
+    uint64_t rem, quo;
+    quo = a / b;
+    rem = a % b;
+    return (rem << 32) | (uint32_t) quo;
+}
+
+static uint64_t __attribute ((used)) ppc_div_helper (int64_t a, int32_t b)
+{
+    int64_t rem, quo;
+    quo = a / b;
+    rem = a % b;
+    return (rem << 32) | (uint32_t) quo;
+}
+
+#define MAKE_TRAMPOLINE(name)                   \
+extern void name##_trampoline (void);           \
+asm (#name "_trampoline:\n"                     \
+     " mflr 0\n"                                \
+     " addi 1,1,-112\n"                         \
+     " mr   4,6\n"                              \
+     " stmw 7,0(1)\n"                           \
+     " stw  0,108(0)\n"                         \
+     " bl   ppc_" #name "_helper\n"             \
+     " lmw  7,0(1)\n"                           \
+     " lwz  0,108(0)\n"                         \
+     " addi 1,1,112\n"                          \
+     " mtlr 0\n"                                \
+     " blr\n"                                   \
+    )
+
+MAKE_TRAMPOLINE (div);
+MAKE_TRAMPOLINE (udiv);
+
+static void tcg_out_div2 (TCGContext *s, int uns)
+{
+    void *label1_ptr, *label2_ptr;
+
+    tcg_out32 (s, CMPLI | BF (7) | RA (3));
+    label1_ptr = s->code_ptr;
+    tcg_out32 (s, BC | BI (7, CR_EQ) | BO_COND_TRUE);
+
+    tcg_out_b (s, LK, (tcg_target_long) (uns ? udiv_trampoline : div_trampoline));
+
+    label2_ptr = s->code_ptr;
+    tcg_out32 (s, B);
+
+    reloc_pc14 (label1_ptr, (tcg_target_long) s->code_ptr);
+
+    tcg_out32 (s, (uns ? DIVWU : DIVW) | TAB (6, 4, 5));
+    tcg_out32 (s, MULLW | TAB (0, 6, 5));
+    tcg_out32 (s, SUBF | TAB (3, 0, 4));
+
+    reloc_pc24 (label2_ptr, (tcg_target_long) s->code_ptr);
+}
+
 static void tcg_out_op(TCGContext *s, int opc, const TCGArg *args,
                        const int *const_args)
 {
@@ -1204,32 +1265,10 @@
         }
         break;
     case INDEX_op_div2_i32:
-        if (args[0] == args[2] || args[0] == args[3]) {
-            tcg_out32 (s, DIVW | TAB (0, args[2], args[3]));
-            tcg_out32 (s, MTSPR | RS (0) | CTR);
-            tcg_out32 (s, MULLW | TAB (0, 0, args[3]));
-            tcg_out32 (s, SUBF | TAB (args[1], 0, args[2]));
-            tcg_out32 (s, MFSPR | RT (args[0]) | CTR);
-        }
-        else {
-            tcg_out32 (s, DIVW | TAB (args[0], args[2], args[3]));
-            tcg_out32 (s, MULLW | TAB (0, args[0], args[3]));
-            tcg_out32 (s, SUBF | TAB (args[1], 0, args[2]));
-        }
+        tcg_out_div2 (s, 0);
         break;
     case INDEX_op_divu2_i32:
-        if (args[0] == args[2] || args[0] == args[3]) {
-            tcg_out32 (s, DIVWU | TAB (0, args[2], args[3]));
-            tcg_out32 (s, MTSPR | RS (0) | CTR);
-            tcg_out32 (s, MULLW | TAB (0, 0, args[3]));
-            tcg_out32 (s, SUBF | TAB (args[1], 0, args[2]));
-            tcg_out32 (s, MFSPR | RT (args[0]) | CTR);
-        }
-        else {
-            tcg_out32 (s, DIVWU | TAB (args[0], args[2], args[3]));
-            tcg_out32 (s, MULLW | TAB (0, args[0], args[3]));
-            tcg_out32 (s, SUBF | TAB (args[1], 0, args[2]));
-        }
+        tcg_out_div2 (s, 1);
         break;
 
     case INDEX_op_shl_i32:
@@ -1372,8 +1411,8 @@
     { INDEX_op_add_i32, { "r", "r", "ri" } },
     { INDEX_op_mul_i32, { "r", "r", "ri" } },
     { INDEX_op_mulu2_i32, { "r", "r", "r", "r" } },
-    { INDEX_op_div2_i32, { "r", "r", "r", "r", "r" } },
-    { INDEX_op_divu2_i32, { "r", "r", "r", "r", "r" } },
+    { INDEX_op_div2_i32, { "D", "A", "B", "1", "C" } },
+    { INDEX_op_divu2_i32, { "D", "A", "B", "1", "C" } },
     { INDEX_op_sub_i32, { "r", "r", "ri" } },
     { INDEX_op_and_i32, { "r", "r", "ri" } },
     { INDEX_op_or_i32, { "r", "r", "ri" } },

Re: [Qemu-devel] [4705] Fix div[u]2.

[Fabrice Bellard]

malc wrote:
> Revision: 4705
>           http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=4705
> Author:   malc
> Date:     2008-06-09 06:06:25 +0000 (Mon, 09 Jun 2008)
> 
> Log Message:
> -----------
> Fix div[u]2.
> 
> Previous code assummed 32 by 32 bit divmod operation, and survived
> x86_64 test only by sheer luck. MIPS wasn't so forgiving.

Are you sure it is needed ? div[u]2 support in currently optional in 
TCG. On some hosts such as PowerPC, implementing div[u] directly is 
simpler. rem[u] can be implemented generically then.

Fabrice.

RE: [Qemu-devel] [4705] Fix div[u]2.

[C.W. Betts]

This seems to break compilation on Mac OS X PowerPC:
gcc -I. -I.. -I/Users/cwbetts/makestuff/qemu-allmac/src/target-i386 -I/Users/cwbetts/makestuff/qemu-allmac/src -MMD -MT tcg/tcg.o -MP -DNEED_CPU_H -D__powerpc__ -D_GNU_SOURCE -D_FILE_OFFSET_BITS=64 -D_LARGEFILE_SOURCE -I/Users/cwbetts/makestuff/qemu-allmac/src/tcg -I/Users/cwbetts/makestuff/qemu-allmac/src/tcg/ppc -I/Users/cwbetts/makestuff/qemu-allmac/src/fpu -DHAS_AUDIO -DHAS_AUDIO_CHOICE -I/Users/cwbetts/makestuff/qemu-allmac/src/slirp -Wall -O2 -g -fno-strict-aliasing -mdynamic-no-pic -m32 -arch ppc -mmacosx-version-min=10.4 -c -o tcg/tcg.o /Users/cwbetts/makestuff/qemu-allmac/src/tcg/tcg.c
/var/folders/zN/zNzLfd+VH20MiY73gvxNNk+++TI/-Tmp-//cc4XwF1x.s:35:Parameter syntax error (parameter 1)
/var/folders/zN/zNzLfd+VH20MiY73gvxNNk+++TI/-Tmp-//cc4XwF1x.s:36:Parameter syntax error (parameter 1)
/var/folders/zN/zNzLfd+VH20MiY73gvxNNk+++TI/-Tmp-//cc4XwF1x.s:37:Parameter syntax error (parameter 1)
/var/folders/zN/zNzLfd+VH20MiY73gvxNNk+++TI/-Tmp-//cc4XwF1x.s:38:Parameter syntax error (parameter 1)
/var/folders/zN/zNzLfd+VH20MiY73gvxNNk+++TI/-Tmp-//cc4XwF1x.s:39:Parameter syntax error (parameter 1)
/var/folders/zN/zNzLfd+VH20MiY73gvxNNk+++TI/-Tmp-//cc4XwF1x.s:41:Parameter syntax error (parameter 1)
/var/folders/zN/zNzLfd+VH20MiY73gvxNNk+++TI/-Tmp-//cc4XwF1x.s:42:Parameter syntax error (parameter 1)
/var/folders/zN/zNzLfd+VH20MiY73gvxNNk+++TI/-Tmp-//cc4XwF1x.s:43:Parameter syntax error (parameter 1)
/var/folders/zN/zNzLfd+VH20MiY73gvxNNk+++TI/-Tmp-//cc4XwF1x.s:44:Parameter syntax error (parameter 2)
/var/folders/zN/zNzLfd+VH20MiY73gvxNNk+++TI/-Tmp-//cc4XwF1x.s:48:Parameter syntax error (parameter 1)
/var/folders/zN/zNzLfd+VH20MiY73gvxNNk+++TI/-Tmp-//cc4XwF1x.s:49:Parameter syntax error (parameter 1)
/var/folders/zN/zNzLfd+VH20MiY73gvxNNk+++TI/-Tmp-//cc4XwF1x.s:50:Parameter syntax error (parameter 1)
/var/folders/zN/zNzLfd+VH20MiY73gvxNNk+++TI/-Tmp-//cc4XwF1x.s:51:Parameter syntax error (parameter 1)
/var/folders/zN/zNzLfd+VH20MiY73gvxNNk+++TI/-Tmp-//cc4XwF1x.s:52:Parameter syntax error (parameter 1)
/var/folders/zN/zNzLfd+VH20MiY73gvxNNk+++TI/-Tmp-//cc4XwF1x.s:54:Parameter syntax error (parameter 1)
/var/folders/zN/zNzLfd+VH20MiY73gvxNNk+++TI/-Tmp-//cc4XwF1x.s:55:Parameter syntax error (parameter 1)
/var/folders/zN/zNzLfd+VH20MiY73gvxNNk+++TI/-Tmp-//cc4XwF1x.s:56:Parameter syntax error (parameter 1)
/var/folders/zN/zNzLfd+VH20MiY73gvxNNk+++TI/-Tmp-//cc4XwF1x.s:57:Parameter syntax error (parameter 2)
make[1]: *** [tcg/tcg.o] Error 1
make: *** [subdir-i386-softmmu] Error 2

----------------------------------------
> To: qemu-devel@nongnu.org
> From: av1474@comtv.ru
> Date: Mon, 9 Jun 2008 06:06:26 +0000
> Subject: [Qemu-devel] [4705] Fix div[u]2.
> 
> Revision: 4705
>           http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=4705
> Author:   malc
> Date:     2008-06-09 06:06:25 +0000 (Mon, 09 Jun 2008)
> 
> Log Message:
> -----------
> Fix div[u]2.
> 
> Previous code assummed 32 by 32 bit divmod operation, and survived
> x86_64 test only by sheer luck. MIPS wasn't so forgiving.
> 
> Modified Paths:
> --------------
>     trunk/tcg/ppc/tcg-target.c
> 

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Re: [Qemu-devel] [4705] Fix div[u]2.

[malc]

On Mon, 9 Jun 2008, Fabrice Bellard wrote:

> malc wrote:
>> Revision: 4705
>>           http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=4705
>> Author:   malc
>> Date:     2008-06-09 06:06:25 +0000 (Mon, 09 Jun 2008)
>> 
>> Log Message:
>> -----------
>> Fix div[u]2.
>> 
>> Previous code assummed 32 by 32 bit divmod operation, and survived
>> x86_64 test only by sheer luck. MIPS wasn't so forgiving.
>
> Are you sure it is needed ? div[u]2 support in currently optional in TCG. On 
> some hosts such as PowerPC, implementing div[u] directly is simpler. rem[u] 
> can be implemented generically then.

When i added TCG_TARGET_HAS_div_i32 plus all that is necessary to handle
div[u]/rem[u]_i32 tcg started to abort at tcg.c:1180 (at least for
arm-softmmu)

-- 
mailto:av1474@comtv.ru

Re: [Qemu-devel] [4705] Fix div[u]2.

[Fabrice Bellard]

malc wrote:
> On Mon, 9 Jun 2008, Fabrice Bellard wrote:
> 
>> malc wrote:
>>> Revision: 4705
>>>           http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=4705
>>> Author:   malc
>>> Date:     2008-06-09 06:06:25 +0000 (Mon, 09 Jun 2008)
>>>
>>> Log Message:
>>> -----------
>>> Fix div[u]2.
>>>
>>> Previous code assummed 32 by 32 bit divmod operation, and survived
>>> x86_64 test only by sheer luck. MIPS wasn't so forgiving.
>>
>> Are you sure it is needed ? div[u]2 support in currently optional in
>> TCG. On some hosts such as PowerPC, implementing div[u] directly is
>> simpler. rem[u] can be implemented generically then.
> 
> When i added TCG_TARGET_HAS_div_i32 plus all that is necessary to handle
> div[u]/rem[u]_i32 tcg started to abort at tcg.c:1180 (at least for
> arm-softmmu)

So this is the bug to solve. Adding divu2 is not necessary, at least
until we decided it is necessary for all TCG targets.

Fabrice.

Re: [Qemu-devel] [4705] Fix div[u]2.

[malc]

On Mon, 9 Jun 2008, Fabrice Bellard wrote:

> malc wrote:
>> On Mon, 9 Jun 2008, Fabrice Bellard wrote:
>>
>>> malc wrote:
>>>> Revision: 4705
>>>>           http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=4705
>>>> Author:   malc
>>>> Date:     2008-06-09 06:06:25 +0000 (Mon, 09 Jun 2008)
>>>>
>>>> Log Message:
>>>> -----------
>>>> Fix div[u]2.
>>>>
>>>> Previous code assummed 32 by 32 bit divmod operation, and survived
>>>> x86_64 test only by sheer luck. MIPS wasn't so forgiving.
>>>
>>> Are you sure it is needed ? div[u]2 support in currently optional in
>>> TCG. On some hosts such as PowerPC, implementing div[u] directly is
>>> simpler. rem[u] can be implemented generically then.
>>
>> When i added TCG_TARGET_HAS_div_i32 plus all that is necessary to handle
>> div[u]/rem[u]_i32 tcg started to abort at tcg.c:1180 (at least for
>> arm-softmmu)
>
> So this is the bug to solve. Adding divu2 is not necessary, at least
> until we decided it is necessary for all TCG targets.

Sorry i messed up with dependencies, everything is working with
TCG_TARGET_HAS_div_i32. It's worth noting that PPC is the only TCG
target that uses it though.

-- 
mailto:av1474@comtv.ru