* [Qemu-devel] [4932] Preliminary PPC64/Linux host support
@ 2008-07-23 19:17 malc
2008-07-24 6:01 ` René Rebe
[not found] ` <1964D914-95C1-4A3E-AE40-2DE082D40C24@hotmail.com>
0 siblings, 2 replies; 29+ messages in thread
From: malc @ 2008-07-23 19:17 UTC (permalink / raw)
To: qemu-devel
Revision: 4932
http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=4932
Author: malc
Date: 2008-07-23 19:17:46 +0000 (Wed, 23 Jul 2008)
Log Message:
-----------
Preliminary PPC64/Linux host support
ppc64.ld from Heikki Lindholm's patch
http://marc.info/?l=qemu-devel&m=114086179024634&w=2
Issues:
x86_64 tripple faults shortly after decompressing the kernel
No immediate versions of most 64 bit operations
More...
Modified Paths:
--------------
trunk/Makefile.target
trunk/configure
trunk/dyngen-exec.h
trunk/dyngen.c
trunk/exec-all.h
trunk/tcg/tcg.h
Added Paths:
-----------
trunk/ppc64.ld
trunk/tcg/ppc64/
trunk/tcg/ppc64/tcg-target.c
trunk/tcg/ppc64/tcg-target.h
Modified: trunk/Makefile.target
===================================================================
--- trunk/Makefile.target 2008-07-23 18:14:33 UTC (rev 4931)
+++ trunk/Makefile.target 2008-07-23 19:17:46 UTC (rev 4932)
@@ -342,6 +342,10 @@
LDFLAGS+=-Wl,-T,$(SRC_PATH)/$(ARCH).ld
endif
+ifeq ($(ARCH),ppc64)
+LDFLAGS+=-Wl,-T,$(SRC_PATH)/$(ARCH).ld
+endif
+
ifeq ($(ARCH),s390)
LDFLAGS+=-Wl,-T,$(SRC_PATH)/$(ARCH).ld
endif
Modified: trunk/configure
===================================================================
--- trunk/configure 2008-07-23 18:14:33 UTC (rev 4931)
+++ trunk/configure 2008-07-23 19:17:46 UTC (rev 4932)
@@ -637,6 +637,24 @@
hostlongbits="64"
fi
+# ppc specific hostlongbits selection
+if test "$cpu" = "powerpc" ; then
+ cat > $TMPC <<EOF
+int main(void){return sizeof(long);}
+EOF
+
+ if $cc $ARCH_CFLAGS -o $TMPE $TMPC 2> /dev/null; then
+ $TMPE
+ case $? in
+ 4) hostlongbits="32";;
+ 8) hostlongbits="64";;
+ *) echo "Couldn't determine bits per long value";;
+ esac
+ else
+ echo hostlongbits test failed
+ fi
+fi
+
# check gcc options support
cat > $TMPC <<EOF
int main(void) {
@@ -995,8 +1013,13 @@
echo "#define HOST_MIPS64 1" >> $config_h
;;
powerpc)
- echo "ARCH=ppc" >> $config_mak
- echo "#define HOST_PPC 1" >> $config_h
+ if test "$hostlongbits" = "32"; then
+ echo "ARCH=ppc" >> $config_mak
+ echo "#define HOST_PPC 1" >> $config_h
+ else
+ echo "ARCH=ppc64" >> $config_mak
+ echo "#define HOST_PPC64 1" >> $config_h
+ fi
;;
s390)
echo "ARCH=s390" >> $config_mak
Modified: trunk/dyngen-exec.h
===================================================================
--- trunk/dyngen-exec.h 2008-07-23 18:14:33 UTC (rev 4931)
+++ trunk/dyngen-exec.h 2008-07-23 19:17:46 UTC (rev 4932)
@@ -38,7 +38,7 @@
// Linux/Sparc64 defines uint64_t
#if !(defined (__sparc_v9__) && defined(__linux__)) && !(defined(__APPLE__) && defined(__x86_64__))
/* XXX may be done for all 64 bits targets ? */
-#if defined (__x86_64__) || defined(__ia64) || defined(__s390x__) || defined(__alpha__)
+#if defined (__x86_64__) || defined(__ia64) || defined(__s390x__) || defined(__alpha__) || defined(__powerpc64__)
typedef unsigned long uint64_t;
#else
typedef unsigned long long uint64_t;
@@ -55,7 +55,7 @@
typedef signed int int32_t;
// Linux/Sparc64 defines int64_t
#if !(defined (__sparc_v9__) && defined(__linux__)) && !(defined(__APPLE__) && defined(__x86_64__))
-#if defined (__x86_64__) || defined(__ia64) || defined(__s390x__) || defined(__alpha__)
+#if defined (__x86_64__) || defined(__ia64) || defined(__s390x__) || defined(__alpha__) || defined(__powerpc64__)
typedef signed long int64_t;
#else
typedef signed long long int64_t;
Modified: trunk/dyngen.c
===================================================================
--- trunk/dyngen.c 2008-07-23 18:14:33 UTC (rev 4931)
+++ trunk/dyngen.c 2008-07-23 19:17:46 UTC (rev 4932)
@@ -68,6 +68,13 @@
#define elf_check_arch(x) ((x) == EM_PPC)
#define ELF_USES_RELOCA
+#elif defined(HOST_PPC64)
+
+#define ELF_CLASS ELFCLASS64
+#define ELF_ARCH EM_PPC64
+#define elf_check_arch(x) ((x) == EM_PPC64)
+#define ELF_USES_RELOCA
+
#elif defined(HOST_S390)
#define ELF_CLASS ELFCLASS32
@@ -1551,6 +1558,8 @@
}
#elif defined(HOST_ARM)
error("dyngen targets not supported on ARM");
+#elif defined(HOST_PPC64)
+ error("dyngen targets not supported on PPC64");
#else
#error unsupported CPU
#endif
@@ -2592,6 +2601,8 @@
}
#elif defined(HOST_ARM)
error("dyngen targets not supported on ARM");
+#elif defined(HOST_PPC64)
+ error("dyngen targets not supported on PPC64");
#else
#error unsupported CPU
#endif
Modified: trunk/exec-all.h
===================================================================
--- trunk/exec-all.h 2008-07-23 18:14:33 UTC (rev 4931)
+++ trunk/exec-all.h 2008-07-23 19:17:46 UTC (rev 4932)
@@ -191,6 +191,10 @@
#if defined(USE_DIRECT_JUMP)
#if defined(__powerpc__)
+#if defined(__powerpc64__)
+extern void ppc_tb_set_jmp_target(unsigned long jmp_addr, unsigned long addr);
+#define tb_set_jmp_target1 ppc_tb_set_jmp_target
+#else
static inline void flush_icache_range(unsigned long start, unsigned long stop);
static inline void tb_set_jmp_target1(unsigned long jmp_addr, unsigned long addr)
{
@@ -223,6 +227,7 @@
/* flush icache */
flush_icache_range(jmp_addr, jmp_addr + patch_size);
}
+#endif
#elif defined(__i386__) || defined(__x86_64__)
static inline void tb_set_jmp_target1(unsigned long jmp_addr, unsigned long addr)
{
Added: trunk/ppc64.ld
===================================================================
--- trunk/ppc64.ld (rev 0)
+++ trunk/ppc64.ld 2008-07-23 19:17:46 UTC (rev 4932)
@@ -0,0 +1,230 @@
+/* Script for -z combreloc: combine and sort reloc sections */
+OUTPUT_FORMAT("elf64-powerpc", "elf64-powerpc",
+ "elf64-powerpc")
+OUTPUT_ARCH(powerpc:common64)
+ENTRY(_start)
+SEARCH_DIR("/usr/powerpc64-unknown-linux-gnu/lib64");
+EARCH_DIR("/usr/lib/binutils/powerpc64-unknown-linux-gnu/2.16.164");
+EARCH_DIR("/usr/local/lib64"); SEARCH_DIR("/lib64"); SEARCH_DIR("/usr/lib64");
+EARCH_DIR("/usr/powerpc64-unknown-linux-gnu/lib");
+EARCH_DIR("/usr/lib/binutils/powerpc64-unknown-linux-gnu/2.16.1");
+EARCH_DIR("/usr/local/lib"); SEARCH_DIR("/lib"); SEARCH_DIR("/usr/lib");
+/* Do we need any of these for elf?
+ __DYNAMIC = 0; */
+SECTIONS
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Added: trunk/tcg/ppc64/tcg-target.c
===================================================================
--- trunk/tcg/ppc64/tcg-target.c (rev 0)
+++ trunk/tcg/ppc64/tcg-target.c 2008-07-23 19:17:46 UTC (rev 4932)
@@ -0,0 +1,1435 @@
+/*
+ * Tiny Code Generator for QEMU
+ *
+ * Copyright (c) 2008 Fabrice Bellard
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+static uint8_t *tb_ret_addr;
+
+#define FAST_PATH
+
+#if TARGET_PHYS_ADDR_BITS == 32
+#define LD_ADDEND LWZ
+#else
+#define LD_ADDEND LD
+#endif
+
+#if TARGET_LONG_BITS == 32
+#define LD_ADDR LWZU
+#else
+#define LD_ADDR LDU
+#endif
+
+static const char * const tcg_target_reg_names[TCG_TARGET_NB_REGS] = {
+ "r0",
+ "r1",
+ "rp",
+ "r3",
+ "r4",
+ "r5",
+ "r6",
+ "r7",
+ "r8",
+ "r9",
+ "r10",
+ "r11",
+ "r12",
+ "r13",
+ "r14",
+ "r15",
+ "r16",
+ "r17",
+ "r18",
+ "r19",
+ "r20",
+ "r21",
+ "r22",
+ "r23",
+ "r24",
+ "r25",
+ "r26",
+ "r27",
+ "r28",
+ "r29",
+ "r30",
+ "r31"
+};
+
+static const int tcg_target_reg_alloc_order[] = {
+ TCG_REG_R14,
+ TCG_REG_R15,
+ TCG_REG_R16,
+ TCG_REG_R17,
+ TCG_REG_R18,
+ TCG_REG_R19,
+ TCG_REG_R20,
+ TCG_REG_R21,
+ TCG_REG_R22,
+ TCG_REG_R23,
+ TCG_REG_R28,
+ TCG_REG_R29,
+ TCG_REG_R30,
+ TCG_REG_R31,
+ TCG_REG_R3,
+ TCG_REG_R4,
+ TCG_REG_R5,
+ TCG_REG_R6,
+ TCG_REG_R7,
+ TCG_REG_R8,
+ TCG_REG_R9,
+ TCG_REG_R10,
+ TCG_REG_R11,
+ TCG_REG_R12,
+ TCG_REG_R13,
+ TCG_REG_R0,
+ TCG_REG_R1,
+ TCG_REG_R2,
+ TCG_REG_R24,
+ TCG_REG_R25,
+ TCG_REG_R26,
+ TCG_REG_R27
+};
+
+static const int tcg_target_call_iarg_regs[] = {
+ TCG_REG_R3,
+ TCG_REG_R4,
+ TCG_REG_R5,
+ TCG_REG_R6,
+ TCG_REG_R7,
+ TCG_REG_R8,
+ TCG_REG_R9,
+ TCG_REG_R10
+};
+
+static const int tcg_target_call_oarg_regs[2] = {
+ TCG_REG_R3
+};
+
+static const int tcg_target_callee_save_regs[] = {
+ TCG_REG_R14,
+ TCG_REG_R15,
+ TCG_REG_R16,
+ TCG_REG_R17,
+ TCG_REG_R18,
+ TCG_REG_R19,
+ TCG_REG_R20,
+ TCG_REG_R21,
+ TCG_REG_R22,
+ TCG_REG_R23,
+ TCG_REG_R28,
+ TCG_REG_R29,
+ TCG_REG_R30,
+ TCG_REG_R31
+};
+
+static uint32_t reloc_pc24_val (void *pc, tcg_target_long target)
+{
+ tcg_target_long disp;
+
+ disp = target - (tcg_target_long) pc;
+ if ((disp << 38) >> 38 != disp)
+ tcg_abort ();
+
+ return disp & 0x3fffffc;
+}
+
+static void reloc_pc24 (void *pc, tcg_target_long target)
+{
+ *(uint32_t *) pc = (*(uint32_t *) pc & ~0x3fffffc)
+ | reloc_pc24_val (pc, target);
+}
+
+static uint16_t reloc_pc14_val (void *pc, tcg_target_long target)
+{
+ tcg_target_long disp;
+
+ disp = target - (tcg_target_long) pc;
+ if (disp != (int16_t) disp)
+ tcg_abort ();
+
+ return disp & 0xfffc;
+}
+
+static void reloc_pc14 (void *pc, tcg_target_long target)
+{
+ *(uint32_t *) pc = (*(uint32_t *) pc & ~0xfffc)
+ | reloc_pc14_val (pc, target);
+}
+
+static void patch_reloc (uint8_t *code_ptr, int type,
+ tcg_target_long value, tcg_target_long addend)
+{
+ value += addend;
+ switch (type) {
+ case R_PPC_REL14:
+ reloc_pc14 (code_ptr, value);
+ break;
+ case R_PPC_REL24:
+ reloc_pc24 (code_ptr, value);
+ break;
+ default:
+ tcg_abort ();
+ }
+}
+
+/* maximum number of register used for input function arguments */
+static int tcg_target_get_call_iarg_regs_count (int flags)
+{
+ return sizeof (tcg_target_call_iarg_regs) / sizeof (tcg_target_call_iarg_regs[0]);
+}
+
+/* parse target specific constraints */
+static int target_parse_constraint (TCGArgConstraint *ct, const char **pct_str)
+{
+ const char *ct_str;
+
+ ct_str = *pct_str;
+ switch (ct_str[0]) {
+ case 'A': case 'B': case 'C': case 'D':
+ ct->ct |= TCG_CT_REG;
+ tcg_regset_set_reg (ct->u.regs, 3 + ct_str[0] - 'A');
+ break;
+ case 'r':
+ ct->ct |= TCG_CT_REG;
+ tcg_regset_set32 (ct->u.regs, 0, 0xffffffff);
+ break;
+ case 'L': /* qemu_ld constraint */
+ ct->ct |= TCG_CT_REG;
+ tcg_regset_set32 (ct->u.regs, 0, 0xffffffff);
+ tcg_regset_reset_reg (ct->u.regs, TCG_REG_R3);
+ tcg_regset_reset_reg (ct->u.regs, TCG_REG_R4);
+ break;
+ case 'K': /* qemu_st[8..32] constraint */
+ ct->ct |= TCG_CT_REG;
+ tcg_regset_set32 (ct->u.regs, 0, 0xffffffff);
+ tcg_regset_reset_reg (ct->u.regs, TCG_REG_R3);
+ tcg_regset_reset_reg (ct->u.regs, TCG_REG_R4);
+ tcg_regset_reset_reg (ct->u.regs, TCG_REG_R5);
+#if TARGET_LONG_BITS == 64
+ tcg_regset_reset_reg (ct->u.regs, TCG_REG_R6);
+#endif
+ break;
+ case 'M': /* qemu_st64 constraint */
+ ct->ct |= TCG_CT_REG;
+ tcg_regset_set32 (ct->u.regs, 0, 0xffffffff);
+ tcg_regset_reset_reg (ct->u.regs, TCG_REG_R3);
+ tcg_regset_reset_reg (ct->u.regs, TCG_REG_R4);
+ tcg_regset_reset_reg (ct->u.regs, TCG_REG_R5);
+ tcg_regset_reset_reg (ct->u.regs, TCG_REG_R6);
+ tcg_regset_reset_reg (ct->u.regs, TCG_REG_R7);
+ break;
+ default:
+ return -1;
+ }
+ ct_str++;
+ *pct_str = ct_str;
+ return 0;
+}
+
+/* test if a constant matches the constraint */
+static int tcg_target_const_match (tcg_target_long val,
+ const TCGArgConstraint *arg_ct)
+{
+ int ct;
+
+ ct = arg_ct->ct;
+ if (ct & TCG_CT_CONST)
+ return 1;
+ return 0;
+}
+
+#define OPCD(opc) ((opc)<<26)
+#define XO19(opc) (OPCD(19)|((opc)<<1))
+#define XO30(opc) (OPCD(30)|((opc)<<2))
+#define XO31(opc) (OPCD(31)|((opc)<<1))
+#define XO58(opc) (OPCD(58)|(opc))
+#define XO62(opc) (OPCD(62)|(opc))
+
+#define B OPCD( 18)
+#define BC OPCD( 16)
+#define LBZ OPCD( 34)
+#define LHZ OPCD( 40)
+#define LHA OPCD( 42)
+#define LWZ OPCD( 32)
+#define STB OPCD( 38)
+#define STH OPCD( 44)
+#define STW OPCD( 36)
+
+#define STD XO62( 0)
+#define STDU XO62( 1)
+#define STDX XO31(149)
+
+#define LD XO58( 0)
+#define LDX XO31( 21)
+#define LDU XO58( 1)
+#define LWA XO58( 10)
+#define LWAX XO31(341)
+
+#define ADDI OPCD( 14)
+#define ADDIS OPCD( 15)
+#define ORI OPCD( 24)
+#define ORIS OPCD( 25)
+#define XORI OPCD( 26)
+#define XORIS OPCD( 27)
+#define ANDI OPCD( 28)
+#define ANDIS OPCD( 29)
+#define MULLI OPCD( 7)
+#define CMPLI OPCD( 10)
+#define CMPI OPCD( 11)
+
+#define LWZU OPCD( 33)
+#define STWU OPCD( 37)
+
+#define RLWINM OPCD( 21)
+
+#define RLDICL XO30( 0)
+#define RLDICR XO30( 1)
+
+#define BCLR XO19( 16)
+#define BCCTR XO19(528)
+#define CRAND XO19(257)
+#define CRANDC XO19(129)
+#define CRNAND XO19(225)
+#define CROR XO19(449)
+
+#define EXTSB XO31(954)
+#define EXTSH XO31(922)
+#define EXTSW XO31(986)
+#define ADD XO31(266)
+#define ADDE XO31(138)
+#define ADDC XO31( 10)
+#define AND XO31( 28)
+#define SUBF XO31( 40)
+#define SUBFC XO31( 8)
+#define SUBFE XO31(136)
+#define OR XO31(444)
+#define XOR XO31(316)
+#define MULLW XO31(235)
+#define MULHWU XO31( 11)
+#define DIVW XO31(491)
+#define DIVWU XO31(459)
+#define CMP XO31( 0)
+#define CMPL XO31( 32)
+#define LHBRX XO31(790)
+#define LWBRX XO31(534)
+#define STHBRX XO31(918)
+#define STWBRX XO31(662)
+#define MFSPR XO31(339)
+#define MTSPR XO31(467)
+#define SRAWI XO31(824)
+#define NEG XO31(104)
+
+#define MULLD XO31(233)
+#define MULHD XO31( 73)
+#define MULHDU XO31( 9)
+#define DIVD XO31(489)
+#define DIVDU XO31(457)
+
+#define LBZX XO31( 87)
+#define LHZX XO31(276)
+#define LHAX XO31(343)
+#define LWZX XO31( 23)
+#define STBX XO31(215)
+#define STHX XO31(407)
+#define STWX XO31(151)
+
+#define SPR(a,b) ((((a)<<5)|(b))<<11)
+#define LR SPR(8, 0)
+#define CTR SPR(9, 0)
+
+#define SLW XO31( 24)
+#define SRW XO31(536)
+#define SRAW XO31(792)
+
+#define SLD XO31( 27)
+#define SRD XO31(539)
+#define SRAD XO31(794)
+
+#define LMW OPCD( 46)
+#define STMW OPCD( 47)
+
+#define TW XO31( 4)
+#define TRAP (TW | TO (31))
+
+#define RT(r) ((r)<<21)
+#define RS(r) ((r)<<21)
+#define RA(r) ((r)<<16)
+#define RB(r) ((r)<<11)
+#define TO(t) ((t)<<21)
+#define SH(s) ((s)<<11)
+#define MB(b) ((b)<<6)
+#define ME(e) ((e)<<1)
+#define BO(o) ((o)<<21)
+#define MB64(b) ((b)<<5)
+
+#define LK 1
+
+#define TAB(t,a,b) (RT(t) | RA(a) | RB(b))
+#define SAB(s,a,b) (RS(s) | RA(a) | RB(b))
+
+#define BF(n) ((n)<<23)
+#define BI(n, c) (((c)+((n)*4))<<16)
+#define BT(n, c) (((c)+((n)*4))<<21)
+#define BA(n, c) (((c)+((n)*4))<<16)
+#define BB(n, c) (((c)+((n)*4))<<11)
+
+#define BO_COND_TRUE BO (12)
+#define BO_COND_FALSE BO ( 4)
+#define BO_ALWAYS BO (20)
+
+enum {
+ CR_LT,
+ CR_GT,
+ CR_EQ,
+ CR_SO
+};
+
+static const uint32_t tcg_to_bc[10] = {
+ [TCG_COND_EQ] = BC | BI (7, CR_EQ) | BO_COND_TRUE,
+ [TCG_COND_NE] = BC | BI (7, CR_EQ) | BO_COND_FALSE,
+ [TCG_COND_LT] = BC | BI (7, CR_LT) | BO_COND_TRUE,
+ [TCG_COND_GE] = BC | BI (7, CR_LT) | BO_COND_FALSE,
+ [TCG_COND_LE] = BC | BI (7, CR_GT) | BO_COND_FALSE,
+ [TCG_COND_GT] = BC | BI (7, CR_GT) | BO_COND_TRUE,
+ [TCG_COND_LTU] = BC | BI (7, CR_LT) | BO_COND_TRUE,
+ [TCG_COND_GEU] = BC | BI (7, CR_LT) | BO_COND_FALSE,
+ [TCG_COND_LEU] = BC | BI (7, CR_GT) | BO_COND_FALSE,
+ [TCG_COND_GTU] = BC | BI (7, CR_GT) | BO_COND_TRUE,
+};
+
+static void tcg_out_mov (TCGContext *s, int ret, int arg)
+{
+ tcg_out32 (s, OR | SAB (arg, ret, arg));
+}
+
+static void tcg_out_rld (TCGContext *s, int op, int ra, int rs, int sh, int mb)
+{
+ sh = SH (sh & 0x1f) | (((sh >> 5) & 1) << 1);
+ mb = MB64 ((mb >> 5) | ((mb << 1) & 0x3f));
+ tcg_out32 (s, op | RA (ra) | RS (rs) | sh | mb);
+}
+
+static void tcg_out_movi32 (TCGContext *s, int ret, int32_t arg)
+{
+ if (arg == (int16_t) arg)
+ tcg_out32 (s, ADDI | RT (ret) | RA (0) | (arg & 0xffff));
+ else {
+ tcg_out32 (s, ADDIS | RT (ret) | RA (0) | ((arg >> 16) & 0xffff));
+ if (arg & 0xffff)
+ tcg_out32 (s, ORI | RS (ret) | RA (ret) | (arg & 0xffff));
+ }
+}
+
+static void tcg_out_movi (TCGContext *s, TCGType type,
+ int ret, tcg_target_long arg)
+{
+ int32_t arg32 = arg;
+
+ if (type == TCG_TYPE_I32 || arg == arg32) {
+ tcg_out_movi32 (s, ret, arg32);
+ }
+ else {
+ if ((uint64_t) arg >> 32) {
+ tcg_out_movi32 (s, ret, (arg >> 32) + (arg32 < 0));
+ tcg_out_rld (s, RLDICR, ret, ret, 32, 31);
+ if (arg32) {
+ tcg_out_movi32 (s, 0, arg32);
+ tcg_out32 (s, ADD | TAB (ret, ret, 0));
+ }
+ }
+ else {
+ tcg_out_movi32 (s, ret, arg32);
+ }
+ }
+}
+
+static void tcg_out_call (TCGContext *s, tcg_target_long arg, int const_arg)
+{
+ int reg;
+
+ if (const_arg) {
+ reg = 2;
+ tcg_out_movi (s, TCG_TYPE_I64, reg, arg);
+ }
+ else reg = arg;
+
+ tcg_out32 (s, LD | RT (0) | RA (reg));
+ tcg_out32 (s, MTSPR | RA (0) | CTR);
+ tcg_out32 (s, LD | RT (11) | RA (reg) | 16);
+ tcg_out32 (s, LD | RT (2) | RA (reg) | 8);
+ tcg_out32 (s, BCCTR | BO_ALWAYS | LK);
+}
+
+static void tcg_out_ldst (TCGContext *s, int ret, int addr,
+ int offset, int op1, int op2)
+{
+ if (offset == (int16_t) offset)
+ tcg_out32 (s, op1 | RT (ret) | RA (addr) | (offset & 0xffff));
+ else {
+ tcg_out_movi (s, TCG_TYPE_I64, 0, offset);
+ tcg_out32 (s, op2 | RT (ret) | RA (addr) | RB (0));
+ }
+}
+
+static void tcg_out_b (TCGContext *s, int mask, tcg_target_long target)
+{
+ tcg_target_long disp;
+
+ disp = target - (tcg_target_long) s->code_ptr;
+ if ((disp << 38) >> 38 == disp)
+ tcg_out32 (s, B | (disp & 0x3fffffc) | mask);
+ else {
+ tcg_out_movi (s, TCG_TYPE_I64, 0, (tcg_target_long) target);
+ tcg_out32 (s, MTSPR | RS (0) | CTR);
+ tcg_out32 (s, BCCTR | BO_ALWAYS | mask);
+ }
+}
+
+#if defined (CONFIG_SOFTMMU)
+extern void __ldb_mmu(void);
+extern void __ldw_mmu(void);
+extern void __ldl_mmu(void);
+extern void __ldq_mmu(void);
+
+extern void __stb_mmu(void);
+extern void __stw_mmu(void);
+extern void __stl_mmu(void);
+extern void __stq_mmu(void);
+
+static void *qemu_ld_helpers[4] = {
+ __ldb_mmu,
+ __ldw_mmu,
+ __ldl_mmu,
+ __ldq_mmu,
+};
+
+static void *qemu_st_helpers[4] = {
+ __stb_mmu,
+ __stw_mmu,
+ __stl_mmu,
+ __stq_mmu,
+};
+#endif
+
+static void tcg_out_tlb_read (TCGContext *s, int r0, int r1, int r2,
+ int addr_reg, int s_bits, int offset)
+{
+#if TARGET_LONG_BITS == 32
+ tcg_out_rld (s, RLDICL, addr_reg, addr_reg, 0, 32);
+#endif
+
+ tcg_out_rld (s, RLDICL, r0, addr_reg,
+ 64 - TARGET_PAGE_BITS,
+ 64 - CPU_TLB_BITS);
+ tcg_out_rld (s, RLDICR, r0, r0,
+ CPU_TLB_ENTRY_BITS,
+ 63 - CPU_TLB_ENTRY_BITS);
+
+ tcg_out32 (s, ADD | TAB (r0, r0, TCG_AREG0));
+ tcg_out32 (s, LD_ADDR | RT (r1) | RA (r0) | offset);
+
+ tcg_out_rld (s, RLDICL, r2, addr_reg,
+ 64 - TARGET_PAGE_BITS,
+ TARGET_PAGE_BITS - s_bits);
+ tcg_out_rld (s, RLDICL, r2, r2, TARGET_PAGE_BITS, 0);
+}
+
+static void tcg_out_qemu_ld (TCGContext *s, const TCGArg *args, int opc)
+{
+ int addr_reg, data_reg, r0, mem_index, s_bits, bswap;
+#ifdef CONFIG_SOFTMMU
+ int r1, r2;
+ void *label1_ptr, *label2_ptr;
+#endif
+
+ data_reg = *args++;
+ addr_reg = *args++;
+ mem_index = *args;
+ s_bits = opc & 3;
+
+#ifdef CONFIG_SOFTMMU
+ r0 = 3;
+ r1 = 4;
+ r2 = 0;
+
+ tcg_out_tlb_read (s, r0, r1, r2, addr_reg, s_bits,
+ offsetof (CPUState, tlb_table[mem_index][0].addr_read));
+
+ tcg_out32 (s, CMP | BF (7) | RA (r2) | RB (r1));
+
+ label1_ptr = s->code_ptr;
+#ifdef FAST_PATH
+ tcg_out32 (s, BC | BI (7, CR_EQ) | BO_COND_TRUE);
+#endif
+
+ /* slow path */
+ tcg_out_mov (s, 3, addr_reg);
+ tcg_out_movi (s, TCG_TYPE_I64, 4, mem_index);
+
+ tcg_out_call (s, (tcg_target_long) qemu_ld_helpers[s_bits], 1);
+
+ switch (opc) {
+ case 0|4:
+ tcg_out32 (s, EXTSB | RA (data_reg) | RS (3));
+ break;
+ case 1|4:
+ tcg_out32 (s, EXTSH | RA (data_reg) | RS (3));
+ break;
+ case 2|4:
+ tcg_out32 (s, EXTSW | RA (data_reg) | RS (3));
+ break;
+ case 0:
+ case 1:
+ case 2:
+ case 3:
+ if (data_reg != 3)
+ tcg_out_mov (s, data_reg, 3);
+ break;
+ }
+ label2_ptr = s->code_ptr;
+ tcg_out32 (s, B);
+
+ /* label1: fast path */
+#ifdef FAST_PATH
+ reloc_pc14 (label1_ptr, (tcg_target_long) s->code_ptr);
+#endif
+
+ /* r0 now contains &env->tlb_table[mem_index][index].addr_read */
+ tcg_out32 (s, (LD_ADDEND
+ | RT (r0)
+ | RA (r0)
+ | (offsetof (CPUTLBEntry, addend)
+ - offsetof (CPUTLBEntry, addr_read))
+ ));
+ /* r0 = env->tlb_table[mem_index][index].addend */
+ tcg_out32 (s, ADD | RT (r0) | RA (r0) | RB (addr_reg));
+ /* r0 = env->tlb_table[mem_index][index].addend + addr */
+
+#else /* !CONFIG_SOFTMMU */
+ r0 = addr_reg;
+#endif
+
+#ifdef TARGET_WORDS_BIGENDIAN
+ bswap = 0;
+#else
+ bswap = 1;
+#endif
+ switch (opc) {
+ default:
+ case 0:
+ tcg_out32 (s, LBZ | RT (data_reg) | RA (r0));
+ break;
+ case 0|4:
+ tcg_out32 (s, LBZ | RT (data_reg) | RA (r0));
+ tcg_out32 (s, EXTSB | RA (data_reg) | RS (data_reg));
+ break;
+ case 1:
+ if (bswap) tcg_out32 (s, LHBRX | RT (data_reg) | RB (r0));
+ else tcg_out32 (s, LHZ | RT (data_reg) | RA (r0));
+ break;
+ case 1|4:
+ if (bswap) {
+ tcg_out32 (s, LHBRX | RT (data_reg) | RB (r0));
+ tcg_out32 (s, EXTSH | RA (data_reg) | RS (data_reg));
+ }
+ else tcg_out32 (s, LHA | RT (data_reg) | RA (r0));
+ break;
+ case 2:
+ if (bswap) tcg_out32 (s, LWBRX | RT (data_reg) | RB (r0));
+ else tcg_out32 (s, LWZ | RT (data_reg)| RA (r0));
+ break;
+ case 2|4:
+ if (bswap) {
+ tcg_out32 (s, LWBRX | RT (data_reg) | RB (r0));
+ tcg_out32 (s, EXTSW | RT (data_reg) | RS (data_reg));
+ }
+ else tcg_out32 (s, LWA | RT (data_reg)| RA (r0));
+ break;
+ case 3:
+ if (bswap) {
+ tcg_out32 (s, LWBRX | RT (data_reg) | RB (r0));
+ tcg_out32 (s, ADDI | RT (r0) | RA (r0) | 4);
+ tcg_out32 (s, LWBRX | RT (r0) | RB (r0));
+ tcg_out_rld (s, RLDICR, r0, r0, 32, 31);
+ tcg_out32 (s, OR | SAB (r0, data_reg, data_reg));
+ }
+ else tcg_out32 (s, LD | RT (data_reg) | RA (r0));
+ break;
+ }
+
+#ifdef CONFIG_SOFTMMU
+ reloc_pc24 (label2_ptr, (tcg_target_long) s->code_ptr);
+#endif
+}
+
+static void tcg_out_qemu_st (TCGContext *s, const TCGArg *args, int opc)
+{
+ int addr_reg, r0, r1, data_reg, mem_index, bswap;
+#ifdef CONFIG_SOFTMMU
+ int r2;
+ void *label1_ptr, *label2_ptr;
+#endif
+
+ data_reg = *args++;
+ addr_reg = *args++;
+ mem_index = *args;
+
+#ifdef CONFIG_SOFTMMU
+ r0 = 3;
+ r1 = 4;
+ r2 = 0;
+
+ tcg_out_tlb_read (s, r0, r1, r2, addr_reg, opc,
+ offsetof (CPUState, tlb_table[mem_index][0].addr_write));
+
+ tcg_out32 (s, CMP | BF (7) | RA (r2) | RB (r1));
+
+ label1_ptr = s->code_ptr;
+#ifdef FAST_PATH
+ tcg_out32 (s, BC | BI (7, CR_EQ) | BO_COND_TRUE);
+#endif
+
+ /* slow path */
+ tcg_out_mov (s, 3, addr_reg);
+ tcg_out_rld (s, RLDICL, 4, data_reg, 0, 64 - (1 << (3 + opc)));
+ tcg_out_movi (s, TCG_TYPE_I64, 5, mem_index);
+
+ tcg_out_call (s, (tcg_target_long) qemu_st_helpers[opc], 1);
+
+ label2_ptr = s->code_ptr;
+ tcg_out32 (s, B);
+
+ /* label1: fast path */
+#ifdef FAST_PATH
+ reloc_pc14 (label1_ptr, (tcg_target_long) s->code_ptr);
+#endif
+
+ tcg_out32 (s, (LD_ADDEND
+ | RT (r0)
+ | RA (r0)
+ | (offsetof (CPUTLBEntry, addend)
+ - offsetof (CPUTLBEntry, addr_write))
+ ));
+ /* r0 = env->tlb_table[mem_index][index].addend */
+ tcg_out32 (s, ADD | RT (r0) | RA (r0) | RB (addr_reg));
+ /* r0 = env->tlb_table[mem_index][index].addend + addr */
+
+#else /* !CONFIG_SOFTMMU */
+ r1 = 4;
+ r0 = addr_reg;
+#endif
+
+#ifdef TARGET_WORDS_BIGENDIAN
+ bswap = 0;
+#else
+ bswap = 1;
+#endif
+ switch (opc) {
+ case 0:
+ tcg_out32 (s, STB | RS (data_reg) | RA (r0));
+ break;
+ case 1:
+ if (bswap) tcg_out32 (s, STHBRX | RS (data_reg) | RA (0) | RB (r0));
+ else tcg_out32 (s, STH | RS (data_reg) | RA (r0));
+ break;
+ case 2:
+ if (bswap) tcg_out32 (s, STWBRX | RS (data_reg) | RA (0) | RB (r0));
+ else tcg_out32 (s, STW | RS (data_reg) | RA (r0));
+ break;
+ case 3:
+ if (bswap) {
+ tcg_out32 (s, STWBRX | RS (data_reg) | RA (0) | RB (r0));
+ tcg_out32 (s, ADDI | RT (r0) | RA (r0) | 4);
+ tcg_out_rld (s, RLDICL, 0, data_reg, 32, 0);
+ tcg_out32 (s, STWBRX | RS (0) | RA (0) | RB (r0));
+ }
+ else tcg_out32 (s, STD | RS (data_reg) | RA (r0));
+ break;
+ }
+
+#ifdef CONFIG_SOFTMMU
+ reloc_pc24 (label2_ptr, (tcg_target_long) s->code_ptr);
+#endif
+}
+
+void tcg_target_qemu_prologue (TCGContext *s)
+{
+ int i, frame_size;
+
+ frame_size = 0
+ + 8 /* back chain */
+ + 8 /* CR */
+ + 8 /* LR */
+ + 8 /* compiler doubleword */
+ + 8 /* link editor doubleword */
+ + 8 /* TOC save area */
+ + TCG_STATIC_CALL_ARGS_SIZE
+ + ARRAY_SIZE (tcg_target_callee_save_regs) * 8
+ ;
+ frame_size = (frame_size + 15) & ~15;
+
+ tcg_out32 (s, MFSPR | RT (0) | LR);
+ tcg_out32 (s, STDU | RS (1) | RA (1) | (-frame_size & 0xffff));
+ for (i = 0; i < ARRAY_SIZE (tcg_target_callee_save_regs); ++i)
+ tcg_out32 (s, (STD
+ | RS (tcg_target_callee_save_regs[i])
+ | RA (1)
+ | (i * 8 + 48 + TCG_STATIC_CALL_ARGS_SIZE)
+ )
+ );
+ tcg_out32 (s, STD | RS (0) | RA (1) | (frame_size + 20));
+ tcg_out32 (s, STD | RS (2) | RA (1) | (frame_size + 40));
+
+ tcg_out32 (s, MTSPR | RS (3) | CTR);
+ tcg_out32 (s, BCCTR | BO_ALWAYS);
+ tb_ret_addr = s->code_ptr;
+
+ for (i = 0; i < ARRAY_SIZE (tcg_target_callee_save_regs); ++i)
+ tcg_out32 (s, (LD
+ | RT (tcg_target_callee_save_regs[i])
+ | RA (1)
+ | (i * 8 + 48 + TCG_STATIC_CALL_ARGS_SIZE)
+ )
+ );
+ tcg_out32 (s, LD | RT (0) | RA (1) | (frame_size + 20));
+ tcg_out32 (s, LD | RT (2) | RA (1) | (frame_size + 40));
+ tcg_out32 (s, MTSPR | RS (0) | LR);
+ tcg_out32 (s, ADDI | RT (1) | RA (1) | frame_size);
+ tcg_out32 (s, BCLR | BO_ALWAYS);
+}
+
+static void tcg_out_ld (TCGContext *s, TCGType type, int ret, int arg1,
+ tcg_target_long arg2)
+{
+ if (type == TCG_TYPE_I32)
+ tcg_out_ldst (s, ret, arg1, arg2, LWZ, LWZX);
+ else
+ tcg_out_ldst (s, ret, arg1, arg2, LD, LDX);
+}
+
+static void tcg_out_st (TCGContext *s, TCGType type, int arg, int arg1,
+ tcg_target_long arg2)
+{
+ if (type == TCG_TYPE_I32)
+ tcg_out_ldst (s, arg, arg1, arg2, STW, STWX);
+ else
+ tcg_out_ldst (s, arg, arg1, arg2, STD, STDX);
+}
+
+static void ppc_addi32 (TCGContext *s, int rt, int ra, tcg_target_long si)
+{
+ if (!si && rt == ra)
+ return;
+
+ if (si == (int16_t) si)
+ tcg_out32 (s, ADDI | RT (rt) | RA (ra) | (si & 0xffff));
+ else {
+ uint16_t h = ((si >> 16) & 0xffff) + ((uint16_t) si >> 15);
+ tcg_out32 (s, ADDIS | RT (rt) | RA (ra) | h);
+ tcg_out32 (s, ADDI | RT (rt) | RA (rt) | (si & 0xffff));
+ }
+}
+
+static void ppc_addi64 (TCGContext *s, int rt, int ra, tcg_target_long si)
+{
+ tcg_out_movi (s, TCG_TYPE_I64, 0, si);
+ tcg_out32 (s, ADD | RT (rt) | RA (ra));
+}
+
+static void tcg_out_addi (TCGContext *s, int reg, tcg_target_long val)
+{
+ ppc_addi64 (s, reg, reg, val);
+}
+
+static void tcg_out_cmp (TCGContext *s, int cond, TCGArg arg1, TCGArg arg2,
+ int const_arg2, int cr)
+{
+ int imm;
+ uint32_t op;
+
+ switch (cond) {
+ case TCG_COND_EQ:
+ case TCG_COND_NE:
+ if (const_arg2) {
+ if ((int16_t) arg2 == arg2) {
+ op = CMPI;
+ imm = 1;
+ break;
+ }
+ else if ((uint16_t) arg2 == arg2) {
+ op = CMPLI;
+ imm = 1;
+ break;
+ }
+ }
+ op = CMPL;
+ imm = 0;
+ break;
+
+ case TCG_COND_LT:
+ case TCG_COND_GE:
+ case TCG_COND_LE:
+ case TCG_COND_GT:
+ if (const_arg2) {
+ if ((int16_t) arg2 == arg2) {
+ op = CMPI;
+ imm = 1;
+ break;
+ }
+ }
+ op = CMP;
+ imm = 0;
+ break;
+
+ case TCG_COND_LTU:
+ case TCG_COND_GEU:
+ case TCG_COND_LEU:
+ case TCG_COND_GTU:
+ if (const_arg2) {
+ if ((uint16_t) arg2 == arg2) {
+ op = CMPLI;
+ imm = 1;
+ break;
+ }
+ }
+ op = CMPL;
+ imm = 0;
+ break;
+
+ default:
+ tcg_abort ();
+ }
+ op |= BF (cr);
+
+ if (imm)
+ tcg_out32 (s, op | RA (arg1) | (arg2 & 0xffff));
+ else {
+ if (const_arg2) {
+ tcg_out_movi (s, TCG_TYPE_I64, 0, arg2);
+ tcg_out32 (s, op | RA (arg1) | RB (0));
+ }
+ else
+ tcg_out32 (s, op | RA (arg1) | RB (arg2));
+ }
+
+}
+
+static void tcg_out_bc (TCGContext *s, int bc, int label_index)
+{
+ TCGLabel *l = &s->labels[label_index];
+
+ if (l->has_value)
+ tcg_out32 (s, bc | reloc_pc14_val (s->code_ptr, l->u.value));
+ else {
+ uint16_t val = *(uint16_t *) &s->code_ptr[2];
+
+ /* Thanks to Andrzej Zaborowski */
+ tcg_out32 (s, bc | (val & 0xfffc));
+ tcg_out_reloc (s, s->code_ptr - 4, R_PPC_REL14, label_index, 0);
+ }
+}
+
+static void tcg_out_brcond (TCGContext *s, int cond,
+ TCGArg arg1, TCGArg arg2, int const_arg2,
+ int label_index)
+{
+ tcg_out_cmp (s, cond, arg1, arg2, const_arg2, 7);
+ tcg_out_bc (s, tcg_to_bc[cond], label_index);
+}
+
+void ppc_tb_set_jmp_target (unsigned long jmp_addr, unsigned long addr)
+{
+ TCGContext s;
+ unsigned long patch_size;
+
+ s.code_ptr = (uint8_t *) jmp_addr;
+ tcg_out_b (&s, 0, addr);
+ patch_size = s.code_ptr - (uint8_t *) jmp_addr;
+ flush_icache_range (jmp_addr, jmp_addr + patch_size);
+}
+
+static void tcg_out_op (TCGContext *s, int opc, const TCGArg *args,
+ const int *const_args)
+{
+ switch (opc) {
+ case INDEX_op_exit_tb:
+ tcg_out_movi (s, TCG_TYPE_I64, TCG_REG_R3, args[0]);
+ tcg_out_b (s, 0, (tcg_target_long) tb_ret_addr);
+ break;
+ case INDEX_op_goto_tb:
+ if (s->tb_jmp_offset) {
+ /* direct jump method */
+
+ s->tb_jmp_offset[args[0]] = s->code_ptr - s->code_buf;
+ s->code_ptr += 32;
+ }
+ else {
+ tcg_abort ();
+ }
+ s->tb_next_offset[args[0]] = s->code_ptr - s->code_buf;
+ break;
+ case INDEX_op_br:
+ {
+ TCGLabel *l = &s->labels[args[0]];
+
+ if (l->has_value) {
+ tcg_out_b (s, 0, l->u.value);
+ }
+ else {
+ uint32_t val = *(uint32_t *) s->code_ptr;
+
+ /* Thanks to Andrzej Zaborowski */
+ tcg_out32 (s, B | (val & 0x3fffffc));
+ tcg_out_reloc (s, s->code_ptr - 4, R_PPC_REL24, args[0], 0);
+ }
+ }
+ break;
+ case INDEX_op_call:
+ tcg_out_call (s, args[0], const_args[0]);
+ break;
+ case INDEX_op_jmp:
+ if (const_args[0]) {
+ tcg_out_b (s, 0, args[0]);
+ }
+ else {
+ tcg_out32 (s, MTSPR | RS (args[0]) | CTR);
+ tcg_out32 (s, BCCTR | BO_ALWAYS);
+ }
+ break;
+ case INDEX_op_movi_i32:
+ tcg_out_movi (s, TCG_TYPE_I32, args[0], args[1]);
+ break;
+ case INDEX_op_movi_i64:
+ tcg_out_movi (s, TCG_TYPE_I64, args[0], args[1]);
+ break;
+ case INDEX_op_ld8u_i32:
+ case INDEX_op_ld8u_i64:
+ tcg_out_ldst (s, args[0], args[1], args[2], LBZ, LBZX);
+ break;
+ case INDEX_op_ld8s_i32:
+ case INDEX_op_ld8s_i64:
+ tcg_out_ldst (s, args[0], args[1], args[2], LBZ, LBZX);
+ tcg_out32 (s, EXTSB | RS (args[0]) | RA (args[0]));
+ break;
+ case INDEX_op_ld16u_i32:
+ case INDEX_op_ld16u_i64:
+ tcg_out_ldst (s, args[0], args[1], args[2], LHZ, LHZX);
+ break;
+ case INDEX_op_ld16s_i32:
+ case INDEX_op_ld16s_i64:
+ tcg_out_ldst (s, args[0], args[1], args[2], LHA, LHAX);
+ break;
+ case INDEX_op_ld_i32:
+ case INDEX_op_ld32u_i64:
+ tcg_out_ldst (s, args[0], args[1], args[2], LWZ, LWZX);
+ break;
+ case INDEX_op_ld32s_i64:
+ tcg_out_ldst (s, args[0], args[1], args[2], LWA, LWAX);
+ break;
+ case INDEX_op_ld_i64:
+ tcg_out_ldst (s, args[0], args[1], args[2], LD, LDX);
+ break;
+ case INDEX_op_st8_i32:
+ case INDEX_op_st8_i64:
+ tcg_out_ldst (s, args[0], args[1], args[2], STB, STBX);
+ break;
+ case INDEX_op_st16_i32:
+ case INDEX_op_st16_i64:
+ tcg_out_ldst (s, args[0], args[1], args[2], STH, STHX);
+ break;
+ case INDEX_op_st_i32:
+ case INDEX_op_st32_i64:
+ tcg_out_ldst (s, args[0], args[1], args[2], STW, STWX);
+ break;
+ case INDEX_op_st_i64:
+ tcg_out_ldst (s, args[0], args[1], args[2], STD, STDX);
+ break;
+
+ case INDEX_op_add_i32:
+ if (const_args[2])
+ ppc_addi32 (s, args[0], args[1], args[2]);
+ else
+ tcg_out32 (s, ADD | TAB (args[0], args[1], args[2]));
+ break;
+ case INDEX_op_sub_i32:
+ if (const_args[2])
+ ppc_addi32 (s, args[0], args[1], -args[2]);
+ else
+ tcg_out32 (s, SUBF | TAB (args[0], args[2], args[1]));
+ break;
+
+ case INDEX_op_and_i32:
+ if (const_args[2]) {
+ if (!args[2])
+ tcg_out_movi (s, TCG_TYPE_I32, args[0], 0);
+ else {
+ if ((args[2] & 0xffff) == args[2])
+ tcg_out32 (s, ANDI | RS (args[1]) | RA (args[0]) | args[2]);
+ else if ((args[2] & 0xffff0000) == args[2])
+ tcg_out32 (s, ANDIS | RS (args[1]) | RA (args[0])
+ | ((args[2] >> 16) & 0xffff));
+ else if (args[2] == 0xffffffff) {
+ if (args[0] != args[1])
+ tcg_out_mov (s, args[0], args[1]);
+ }
+ else {
+ tcg_out_movi (s, TCG_TYPE_I32, 0, args[2]);
+ tcg_out32 (s, AND | SAB (args[1], args[0], 0));
+ }
+ }
+ }
+ else
+ tcg_out32 (s, AND | SAB (args[1], args[0], args[2]));
+ break;
+ case INDEX_op_or_i32:
+ if (const_args[2]) {
+ if (args[2]) {
+ if (args[2] & 0xffff) {
+ tcg_out32 (s, ORI | RS (args[1]) | RA (args[0])
+ | (args[2] & 0xffff));
+ if (args[2] >> 16)
+ tcg_out32 (s, ORIS | RS (args[0]) | RA (args[0])
+ | ((args[2] >> 16) & 0xffff));
+ }
+ else {
+ tcg_out32 (s, ORIS | RS (args[1]) | RA (args[0])
+ | ((args[2] >> 16) & 0xffff));
+ }
+ }
+ else {
+ if (args[0] != args[1])
+ tcg_out_mov (s, args[0], args[1]);
+ }
+ }
+ else
+ tcg_out32 (s, OR | SAB (args[1], args[0], args[2]));
+ break;
+ case INDEX_op_xor_i32:
+ if (const_args[2]) {
+ if (args[2]) {
+ if ((args[2] & 0xffff) == args[2])
+ tcg_out32 (s, XORI | RS (args[1]) | RA (args[0])
+ | (args[2] & 0xffff));
+ else if ((args[2] & 0xffff0000) == args[2])
+ tcg_out32 (s, XORIS | RS (args[1]) | RA (args[0])
+ | ((args[2] >> 16) & 0xffff));
+ else {
+ tcg_out_movi (s, TCG_TYPE_I32, 0, args[2]);
+ tcg_out32 (s, XOR | SAB (args[1], args[0], 0));
+ }
+ }
+ else {
+ if (args[0] != args[1])
+ tcg_out_mov (s, args[0], args[1]);
+ }
+ }
+ else
+ tcg_out32 (s, XOR | SAB (args[1], args[0], args[2]));
+ break;
+
+ case INDEX_op_mul_i32:
+ if (const_args[2]) {
+ if (args[2] == (int16_t) args[2])
+ tcg_out32 (s, MULLI | RT (args[0]) | RA (args[1])
+ | (args[2] & 0xffff));
+ else {
+ tcg_out_movi (s, TCG_TYPE_I32, 0, args[2]);
+ tcg_out32 (s, MULLW | TAB (args[0], args[1], 0));
+ }
+ }
+ else
+ tcg_out32 (s, MULLW | TAB (args[0], args[1], args[2]));
+ break;
+
+ case INDEX_op_div_i32:
+ tcg_out32 (s, DIVW | TAB (args[0], args[1], args[2]));
+ break;
+
+ case INDEX_op_divu_i32:
+ tcg_out32 (s, DIVWU | TAB (args[0], args[1], args[2]));
+ break;
+
+ case INDEX_op_rem_i32:
+ tcg_out32 (s, DIVW | TAB (0, args[1], args[2]));
+ tcg_out32 (s, MULLW | TAB (0, 0, args[2]));
+ tcg_out32 (s, SUBF | TAB (args[0], 0, args[1]));
+ break;
+
+ case INDEX_op_remu_i32:
+ tcg_out32 (s, DIVWU | TAB (0, args[1], args[2]));
+ tcg_out32 (s, MULLW | TAB (0, 0, args[2]));
+ tcg_out32 (s, SUBF | TAB (args[0], 0, args[1]));
+ break;
+
+ case INDEX_op_shl_i32:
+ if (const_args[2]) {
+ if (args[2])
+ tcg_out32 (s, (RLWINM
+ | RA (args[0])
+ | RS (args[1])
+ | SH (args[2])
+ | MB (0)
+ | ME (31 - args[2])
+ )
+ );
+ else
+ tcg_out_mov (s, args[0], args[1]);
+ }
+ else
+ tcg_out32 (s, SLW | SAB (args[1], args[0], args[2]));
+ break;
+ case INDEX_op_shr_i32:
+ if (const_args[2]) {
+ if (args[2])
+ tcg_out32 (s, (RLWINM
+ | RA (args[0])
+ | RS (args[1])
+ | SH (32 - args[2])
+ | MB (args[2])
+ | ME (31)
+ )
+ );
+ else
+ tcg_out_mov (s, args[0], args[1]);
+ }
+ else
+ tcg_out32 (s, SRW | SAB (args[1], args[0], args[2]));
+ break;
+ case INDEX_op_sar_i32:
+ if (const_args[2])
+ tcg_out32 (s, SRAWI | RS (args[1]) | RA (args[0]) | SH (args[2]));
+ else
+ tcg_out32 (s, SRAW | SAB (args[1], args[0], args[2]));
+ break;
+
+ case INDEX_op_brcond_i32:
+ case INDEX_op_brcond_i64:
+ tcg_out_brcond (s, args[2], args[0], args[1], const_args[1], args[3]);
+ break;
+
+ case INDEX_op_neg_i32:
+ tcg_out32 (s, TRAP);
+ break;
+ case INDEX_op_neg_i64:
+ tcg_out32 (s, NEG | RT (args[0]) | RA (args[1]));
+ break;
+
+ case INDEX_op_add_i64:
+ tcg_out32 (s, ADD | TAB (args[0], args[1], args[2]));
+ break;
+ case INDEX_op_sub_i64:
+ tcg_out32 (s, SUBF | TAB (args[0], args[2], args[1]));
+ break;
+
+ case INDEX_op_and_i64:
+ tcg_out32 (s, AND | SAB (args[1], args[0], args[2]));
+ break;
+ case INDEX_op_or_i64:
+ tcg_out32 (s, OR | SAB (args[1], args[0], args[2]));
+ break;
+ case INDEX_op_xor_i64:
+ tcg_out32 (s, XOR | SAB (args[1], args[0], args[2]));
+ break;
+
+ case INDEX_op_shl_i64:
+ tcg_out32 (s, SLD | SAB (args[1], args[0], args[2]));
+ break;
+ case INDEX_op_shr_i64:
+ tcg_out32 (s, SRD | SAB (args[1], args[0], args[2]));
+ break;
+ case INDEX_op_sar_i64:
+ tcg_out32 (s, SRAD | SAB (args[1], args[0], args[2]));
+ break;
+
+ case INDEX_op_mul_i64:
+ tcg_out32 (s, MULLD | TAB (args[0], args[1], args[2]));
+ break;
+ case INDEX_op_div_i64:
+ tcg_out32 (s, DIVD | TAB (args[0], args[1], args[2]));
+ break;
+ case INDEX_op_divu_i64:
+ tcg_out32 (s, DIVDU | TAB (args[0], args[1], args[2]));
+ break;
+ case INDEX_op_rem_i64:
+ tcg_out32 (s, DIVD | TAB (0, args[1], args[2]));
+ tcg_out32 (s, MULLD | TAB (0, 0, args[2]));
+ tcg_out32 (s, SUBF | TAB (args[0], 0, args[1]));
+ break;
+ case INDEX_op_remu_i64:
+ tcg_out32 (s, DIVDU | TAB (0, args[1], args[2]));
+ tcg_out32 (s, MULLD | TAB (0, 0, args[2]));
+ tcg_out32 (s, SUBF | TAB (args[0], 0, args[1]));
+ break;
+
+ case INDEX_op_qemu_ld8u:
+ tcg_out_qemu_ld (s, args, 0);
+ break;
+ case INDEX_op_qemu_ld8s:
+ tcg_out_qemu_ld (s, args, 0 | 4);
+ break;
+ case INDEX_op_qemu_ld16u:
+ tcg_out_qemu_ld (s, args, 1);
+ break;
+ case INDEX_op_qemu_ld16s:
+ tcg_out_qemu_ld (s, args, 1 | 4);
+ break;
+ case INDEX_op_qemu_ld32u:
+ tcg_out_qemu_ld (s, args, 2);
+ break;
+ case INDEX_op_qemu_ld32s:
+ tcg_out_qemu_ld (s, args, 2 | 4);
+ break;
+ case INDEX_op_qemu_ld64:
+ tcg_out_qemu_ld (s, args, 3);
+ break;
+ case INDEX_op_qemu_st8:
+ tcg_out_qemu_st (s, args, 0);
+ break;
+ case INDEX_op_qemu_st16:
+ tcg_out_qemu_st (s, args, 1);
+ break;
+ case INDEX_op_qemu_st32:
+ tcg_out_qemu_st (s, args, 2);
+ break;
+ case INDEX_op_qemu_st64:
+ tcg_out_qemu_st (s, args, 3);
+ break;
+
+ default:
+ tcg_dump_ops (s, stderr);
+ tcg_abort ();
+ }
+}
+
+static const TCGTargetOpDef ppc_op_defs[] = {
+ { INDEX_op_exit_tb, { } },
+ { INDEX_op_goto_tb, { } },
+ { INDEX_op_call, { "ri" } },
+ { INDEX_op_jmp, { "ri" } },
+ { INDEX_op_br, { } },
+
+ { INDEX_op_mov_i32, { "r", "r" } },
+ { INDEX_op_mov_i64, { "r", "r" } },
+ { INDEX_op_movi_i32, { "r" } },
+ { INDEX_op_movi_i64, { "r" } },
+
+ { INDEX_op_ld8u_i32, { "r", "r" } },
+ { INDEX_op_ld8s_i32, { "r", "r" } },
+ { INDEX_op_ld16u_i32, { "r", "r" } },
+ { INDEX_op_ld16s_i32, { "r", "r" } },
+ { INDEX_op_ld_i32, { "r", "r" } },
+ { INDEX_op_ld_i64, { "r", "r" } },
+ { INDEX_op_st8_i32, { "r", "r" } },
+ { INDEX_op_st8_i64, { "r", "r" } },
+ { INDEX_op_st16_i32, { "r", "r" } },
+ { INDEX_op_st16_i64, { "r", "r" } },
+ { INDEX_op_st_i32, { "r", "r" } },
+ { INDEX_op_st_i64, { "r", "r" } },
+ { INDEX_op_st32_i64, { "r", "r" } },
+
+ { INDEX_op_ld8u_i64, { "r", "r" } },
+ { INDEX_op_ld8s_i64, { "r", "r" } },
+ { INDEX_op_ld16u_i64, { "r", "r" } },
+ { INDEX_op_ld16s_i64, { "r", "r" } },
+ { INDEX_op_ld32u_i64, { "r", "r" } },
+ { INDEX_op_ld32s_i64, { "r", "r" } },
+ { INDEX_op_ld_i64, { "r", "r" } },
+
+ { INDEX_op_add_i32, { "r", "r", "ri" } },
+ { INDEX_op_mul_i32, { "r", "r", "ri" } },
+ { INDEX_op_div_i32, { "r", "r", "r" } },
+ { INDEX_op_divu_i32, { "r", "r", "r" } },
+ { INDEX_op_rem_i32, { "r", "r", "r" } },
+ { INDEX_op_remu_i32, { "r", "r", "r" } },
+ { INDEX_op_sub_i32, { "r", "r", "ri" } },
+ { INDEX_op_and_i32, { "r", "r", "ri" } },
+ { INDEX_op_or_i32, { "r", "r", "ri" } },
+ { INDEX_op_xor_i32, { "r", "r", "ri" } },
+
+ { INDEX_op_shl_i32, { "r", "r", "ri" } },
+ { INDEX_op_shr_i32, { "r", "r", "ri" } },
+ { INDEX_op_sar_i32, { "r", "r", "ri" } },
+
+ { INDEX_op_brcond_i32, { "r", "ri" } },
+ { INDEX_op_brcond_i64, { "r", "ri" } },
+
+ { INDEX_op_neg_i32, { "r", "r" } },
+
+ { INDEX_op_add_i64, { "r", "r", "r" } },
+ { INDEX_op_sub_i64, { "r", "r", "r" } },
+ { INDEX_op_and_i64, { "r", "r", "r" } },
+ { INDEX_op_or_i64, { "r", "r", "r" } },
+ { INDEX_op_xor_i64, { "r", "r", "r" } },
+
+ { INDEX_op_shl_i64, { "r", "r", "r" } },
+ { INDEX_op_shr_i64, { "r", "r", "r" } },
+ { INDEX_op_sar_i64, { "r", "r", "r" } },
+
+ { INDEX_op_mul_i64, { "r", "r", "ri" } },
+ { INDEX_op_div_i64, { "r", "r", "r" } },
+ { INDEX_op_divu_i64, { "r", "r", "r" } },
+ { INDEX_op_rem_i64, { "r", "r", "r" } },
+ { INDEX_op_remu_i64, { "r", "r", "r" } },
+
+ { INDEX_op_neg_i64, { "r", "r" } },
+
+ { INDEX_op_qemu_ld8u, { "r", "L" } },
+ { INDEX_op_qemu_ld8s, { "r", "L" } },
+ { INDEX_op_qemu_ld16u, { "r", "L" } },
+ { INDEX_op_qemu_ld16s, { "r", "L" } },
+ { INDEX_op_qemu_ld32u, { "r", "L" } },
+ { INDEX_op_qemu_ld32s, { "r", "L" } },
+ { INDEX_op_qemu_ld64, { "r", "r", "L" } },
+
+ { INDEX_op_qemu_st8, { "K", "K" } },
+ { INDEX_op_qemu_st16, { "K", "K" } },
+ { INDEX_op_qemu_st32, { "K", "K" } },
+ { INDEX_op_qemu_st64, { "M", "M", "M" } },
+
+ { -1 },
+};
+
+void tcg_target_init (TCGContext *s)
+{
+ tcg_regset_set32 (tcg_target_available_regs[TCG_TYPE_I32], 0, 0xffffffff);
+ tcg_regset_set32 (tcg_target_available_regs[TCG_TYPE_I64], 0, 0xffffffff);
+ tcg_regset_set32 (tcg_target_call_clobber_regs, 0,
+ (1 << TCG_REG_R0) |
+ (1 << TCG_REG_R3) |
+ (1 << TCG_REG_R4) |
+ (1 << TCG_REG_R5) |
+ (1 << TCG_REG_R6) |
+ (1 << TCG_REG_R7) |
+ (1 << TCG_REG_R8) |
+ (1 << TCG_REG_R9) |
+ (1 << TCG_REG_R10) |
+ (1 << TCG_REG_R11) |
+ (1 << TCG_REG_R12)
+ );
+
+ tcg_regset_clear (s->reserved_regs);
+ tcg_regset_set_reg (s->reserved_regs, TCG_REG_R0);
+ tcg_regset_set_reg (s->reserved_regs, TCG_REG_R1);
+ tcg_regset_set_reg (s->reserved_regs, TCG_REG_R2);
+ tcg_regset_set_reg (s->reserved_regs, TCG_REG_R13);
+
+ tcg_add_target_add_op_defs (ppc_op_defs);
+}
Added: trunk/tcg/ppc64/tcg-target.h
===================================================================
--- trunk/tcg/ppc64/tcg-target.h (rev 0)
+++ trunk/tcg/ppc64/tcg-target.h 2008-07-23 19:17:46 UTC (rev 4932)
@@ -0,0 +1,100 @@
+/*
+ * Tiny Code Generator for QEMU
+ *
+ * Copyright (c) 2008 Fabrice Bellard
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+#define TCG_TARGET_PPC64 1
+
+#define TCG_TARGET_REG_BITS 64
+#define TCG_TARGET_WORDS_BIGENDIAN
+#define TCG_TARGET_NB_REGS 32
+
+enum {
+ TCG_REG_R0 = 0,
+ TCG_REG_R1,
+ TCG_REG_R2,
+ TCG_REG_R3,
+ TCG_REG_R4,
+ TCG_REG_R5,
+ TCG_REG_R6,
+ TCG_REG_R7,
+ TCG_REG_R8,
+ TCG_REG_R9,
+ TCG_REG_R10,
+ TCG_REG_R11,
+ TCG_REG_R12,
+ TCG_REG_R13,
+ TCG_REG_R14,
+ TCG_REG_R15,
+ TCG_REG_R16,
+ TCG_REG_R17,
+ TCG_REG_R18,
+ TCG_REG_R19,
+ TCG_REG_R20,
+ TCG_REG_R21,
+ TCG_REG_R22,
+ TCG_REG_R23,
+ TCG_REG_R24,
+ TCG_REG_R25,
+ TCG_REG_R26,
+ TCG_REG_R27,
+ TCG_REG_R28,
+ TCG_REG_R29,
+ TCG_REG_R30,
+ TCG_REG_R31
+};
+
+/* used for function call generation */
+#define TCG_REG_CALL_STACK TCG_REG_R1
+#define TCG_TARGET_STACK_ALIGN 16
+#define TCG_TARGET_CALL_STACK_OFFSET 8
+
+/* optional instructions */
+#define TCG_TARGET_HAS_neg_i32
+#define TCG_TARGET_HAS_div_i32
+#define TCG_TARGET_HAS_neg_i64
+#define TCG_TARGET_HAS_div_i64
+
+#define TCG_AREG0 TCG_REG_R27
+#define TCG_AREG1 TCG_REG_R24
+#define TCG_AREG2 TCG_REG_R25
+#define TCG_AREG3 TCG_REG_R26
+
+/* taken directly from tcg-dyngen.c */
+#define MIN_CACHE_LINE_SIZE 8 /* conservative value */
+
+static inline void flush_icache_range(unsigned long start, unsigned long stop)
+{
+ unsigned long p;
+
+ start &= ~(MIN_CACHE_LINE_SIZE - 1);
+ stop = (stop + MIN_CACHE_LINE_SIZE - 1) & ~(MIN_CACHE_LINE_SIZE - 1);
+
+ for (p = start; p < stop; p += MIN_CACHE_LINE_SIZE) {
+ asm volatile ("dcbst 0,%0" : : "r"(p) : "memory");
+ }
+ asm volatile ("sync" : : : "memory");
+ for (p = start; p < stop; p += MIN_CACHE_LINE_SIZE) {
+ asm volatile ("icbi 0,%0" : : "r"(p) : "memory");
+ }
+ asm volatile ("sync" : : : "memory");
+ asm volatile ("isync" : : : "memory");
+}
Modified: trunk/tcg/tcg.h
===================================================================
--- trunk/tcg/tcg.h 2008-07-23 18:14:33 UTC (rev 4931)
+++ trunk/tcg/tcg.h 2008-07-23 19:17:46 UTC (rev 4932)
@@ -414,8 +414,23 @@
extern uint8_t code_gen_prologue[];
#ifdef __powerpc__
+#ifdef __powerpc64__
+#define tcg_qemu_tb_exec(tb_ptr) \
+ ({ unsigned long p; \
+ asm volatile ( \
+ "mtctr %1\n\t" \
+ "mr 3,%2\n\t" \
+ "bctrl\n\t" \
+ "mr %0,3\n\t" \
+ : "=r" (p) \
+ : "r" (code_gen_prologue), "r" (tb_ptr) \
+ : "3", "4", "5", "6", "7", "8", "9", "10", "11", "12"); \
+ p; \
+ })
+#else
#define tcg_qemu_tb_exec(tb_ptr) \
((long REGPARM __attribute__ ((longcall)) (*)(void *))code_gen_prologue)(tb_ptr)
+#endif
#else
#define tcg_qemu_tb_exec(tb_ptr) ((long REGPARM (*)(void *))code_gen_prologue)(tb_ptr)
#endif
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [Qemu-devel] [4932] Preliminary PPC64/Linux host support
2008-07-23 19:17 [Qemu-devel] [4932] Preliminary PPC64/Linux host support malc
@ 2008-07-24 6:01 ` René Rebe
2008-07-24 17:41 ` malc
[not found] ` <1964D914-95C1-4A3E-AE40-2DE082D40C24@hotmail.com>
1 sibling, 1 reply; 29+ messages in thread
From: René Rebe @ 2008-07-24 6:01 UTC (permalink / raw)
To: qemu-devel
Hi,
malc wrote:
> Revision: 4932
> http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=4932
> Author: malc
> Date: 2008-07-23 19:17:46 +0000 (Wed, 23 Jul 2008)
>
> Log Message:
> -----------
> Preliminary PPC64/Linux host support
>
> ppc64.ld from Heikki Lindholm's patch
> http://marc.info/?l=qemu-devel&m=114086179024634&w=2
>
> Issues:
> x86_64 tripple faults shortly after decompressing the kernel
> No immediate versions of most 64 bit operations
>
Nice! I already spent some hours fixing a previous ppc64 patch that
was sent to the list like half a year ago, which was pre TCG and
did not work with relocations generated by latest toolchains.
I'll definetly give this patch a try ASAP and try to find some time
slots to help streamlining it.
Yours,
--
René Rebe - ExactCODE GmbH - Europe, Germany, Berlin
http://exactcode.de | http://t2-project.org | http://rene.rebe.name
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [Qemu-devel] [4932] Preliminary PPC64/Linux host support
2008-07-24 6:01 ` René Rebe
@ 2008-07-24 17:41 ` malc
2008-07-24 18:42 ` Andreas Färber
2008-07-25 8:41 ` René Rebe
0 siblings, 2 replies; 29+ messages in thread
From: malc @ 2008-07-24 17:41 UTC (permalink / raw)
To: qemu-devel
On Thu, 24 Jul 2008, Ren Rebe wrote:
> Hi,
>
> malc wrote:
>> Revision: 4932
>> http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=4932
>> Author: malc
>> Date: 2008-07-23 19:17:46 +0000 (Wed, 23 Jul 2008)
>>
>> Log Message:
>> -----------
>> Preliminary PPC64/Linux host support
>>
>> ppc64.ld from Heikki Lindholm's patch
>> http://marc.info/?l=qemu-devel&m=114086179024634&w=2
>>
>> Issues:
>> x86_64 tripple faults shortly after decompressing the kernel
>> No immediate versions of most 64 bit operations
>>
> Nice! I already spent some hours fixing a previous ppc64 patch that
> was sent to the list like half a year ago, which was pre TCG and
> did not work with relocations generated by latest toolchains.
>
> I'll definetly give this patch a try ASAP and try to find some time
> slots to help streamlining it.
That would be great. One thing i failed to mention in the commit
message is that linux-user support seems completely broken on ppc64,
i.e. doesn't even compile and error messages are frightening (or
maybe it was the amount of them that scared me)
--
mailto:av1474@comtv.ru
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [Qemu-devel] [4932] Preliminary PPC64/Linux host support
2008-07-24 17:41 ` malc
@ 2008-07-24 18:42 ` Andreas Färber
2008-07-25 8:41 ` René Rebe
1 sibling, 0 replies; 29+ messages in thread
From: Andreas Färber @ 2008-07-24 18:42 UTC (permalink / raw)
To: qemu-devel
Hi Vassili,
Am 24.07.2008 um 19:41 schrieb malc:
> On Thu, 24 Jul 2008, Ren Rebe wrote:
>
>> I'll definetly give this patch a try ASAP and try to find some time
>> slots to help streamlining it.
>
> That would be great.
I'll chime in testing on Linux/ppc64.
Sorry, finally I have some more time - I've already been
unsuccessfully working on a patch for OSX/ppc, adjusting the stack
offsets, but kept getting an immediate crash. I'll post what I have
the next days.
Andreas
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [Qemu-devel] [4932] Preliminary PPC64/Linux host support
[not found] ` <1964D914-95C1-4A3E-AE40-2DE082D40C24@hotmail.com>
@ 2008-07-24 23:33 ` C.W. Betts
2008-07-25 18:18 ` malc
2008-07-26 13:39 ` [Qemu-devel] [4932] Preliminary PPC64/Linux host support Andreas Färber
0 siblings, 2 replies; 29+ messages in thread
From: C.W. Betts @ 2008-07-24 23:33 UTC (permalink / raw)
To: qemu-devel
Building it under OS X 10.5.4 doesn't work. After editing the config-
host files, I get the following:
In file included from /Users/cwbetts/makestuff/qemu-allmac/src/exec-
all.h:320,
from /Users/cwbetts/makestuff/qemu-allmac/src/vl.c:
136:
/Users/cwbetts/makestuff/qemu-allmac/src/qemu-lock.h:216:2: error:
#error unimplemented CPU support
After adding
#define __powerpc__ 1
#define __powerpc64__ 1
It chokes up under
In file included from /usr/include/inttypes.h:255,
from /Users/cwbetts/makestuff/qemu-allmac/src/cpu-
defs.h:29,
from /Users/cwbetts/makestuff/qemu-allmac/src/target-
i386/exec.h:30,
from /Users/cwbetts/makestuff/qemu-allmac/src/cpu-
exec.c:22:
/usr/lib/gcc/powerpc-apple-darwin9/4.2.1/include/stdint.h:35: error:
conflicting types for ‘int64_t’
/Users/cwbetts/makestuff/qemu-allmac/src/dyngen-exec.h:59: error:
previous declaration of ‘int64_t’ was here
/usr/lib/gcc/powerpc-apple-darwin9/4.2.1/include/stdint.h:55: error:
conflicting types for ‘uint64_t’
/Users/cwbetts/makestuff/qemu-allmac/src/dyngen-exec.h:42: error:
previous declaration of ‘uint64_t’ was here
make: *** [cpu-exec.o] Error 1
I know that this isn't exactly designed for PPC Macs, but the tcg
files compiled without a problem.
On Jul 23, 2008, at 1:17 PM, malc wrote:
> Revision: 4932
> http://svn.sv.gnu.org/viewvc/?
> view=rev&root=qemu&revision=4932
> Author: malc
> Date: 2008-07-23 19:17:46 +0000 (Wed, 23 Jul 2008)
>
> Log Message:
> -----------
> Preliminary PPC64/Linux host support
>
> ppc64.ld from Heikki Lindholm's patch
> http://marc.info/?l=qemu-devel&m=114086179024634&w=2
>
> Issues:
> x86_64 tripple faults shortly after decompressing the kernel
> No immediate versions of most 64 bit operations
> More...
>
> Modified Paths:
> --------------
> trunk/Makefile.target
> trunk/configure
> trunk/dyngen-exec.h
> trunk/dyngen.c
> trunk/exec-all.h
> trunk/tcg/tcg.h
>
> Added Paths:
> -----------
> trunk/ppc64.ld
> trunk/tcg/ppc64/
> trunk/tcg/ppc64/tcg-target.c
> trunk/tcg/ppc64/tcg-target.h
>
>
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [Qemu-devel] [4932] Preliminary PPC64/Linux host support
2008-07-24 17:41 ` malc
2008-07-24 18:42 ` Andreas Färber
@ 2008-07-25 8:41 ` René Rebe
2008-07-25 18:15 ` malc
1 sibling, 1 reply; 29+ messages in thread
From: René Rebe @ 2008-07-25 8:41 UTC (permalink / raw)
To: qemu-devel
malc wrote:
> On Thu, 24 Jul 2008, Ren Rebe wrote:
>
>> Hi,
>>
>> malc wrote:
>>> Revision: 4932
>>>
>>> http://svn.sv.gnu.org/viewvc/?view=rev&root=qemu&revision=4932
>>> Author: malc
>>> Date: 2008-07-23 19:17:46 +0000 (Wed, 23 Jul 2008)
>>>
>>> Log Message:
>>> -----------
>>> Preliminary PPC64/Linux host support
>>>
>>> ppc64.ld from Heikki Lindholm's patch
>>> http://marc.info/?l=qemu-devel&m=114086179024634&w=2
>>>
>>> Issues:
>>> x86_64 tripple faults shortly after decompressing the kernel
>>> No immediate versions of most 64 bit operations
>>>
>> Nice! I already spent some hours fixing a previous ppc64 patch that
>> was sent to the list like half a year ago, which was pre TCG and
>> did not work with relocations generated by latest toolchains.
>>
>> I'll definetly give this patch a try ASAP and try to find some time
>> slots to help streamlining it.
>
> That would be great. One thing i failed to mention in the commit
> message is that linux-user support seems completely broken on ppc64,
> i.e. doesn't even compile and error messages are frightening (or
> maybe it was the amount of them that scared me)
I gave it a spin yesterday, it built and managed to boot a decent linux-2.6
system until the first user-space programs after init where running and
segfaulted thereafter.
I'm abroad the next days, but I'll definetly will help (or try to, I'm no
yet that into TCG, yet :-) to hunt those segfaults :-)
Yours,
--
René Rebe - ExactCODE GmbH - Europe, Germany, Berlin
http://exactcode.de | http://t2-project.org | http://rene.rebe.name
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [Qemu-devel] [4932] Preliminary PPC64/Linux host support
2008-07-25 8:41 ` René Rebe
@ 2008-07-25 18:15 ` malc
2008-07-26 19:32 ` René Rebe
0 siblings, 1 reply; 29+ messages in thread
From: malc @ 2008-07-25 18:15 UTC (permalink / raw)
To: qemu-devel
On Fri, 25 Jul 2008, Ren? Rebe wrote:
> malc wrote:
>> On Thu, 24 Jul 2008, Ren Rebe wrote:
>>
[..snip..]
> I gave it a spin yesterday, it built and managed to boot a decent linux-2.6
> system until the first user-space programs after init where running and
> segfaulted thereafter.
'Decent linux-2.6 system'? Recent perhaps? In any case that is strange
since linux-test image does work here as does ls after booting it (not
much, i know)
> I'm abroad the next days, but I'll definetly will help (or try to, I'm no
> yet that into TCG, yet :-) to hunt those segfaults :-)
Thanks, in the meantime can You tell what is that you have unsuccessfully
tried to boot?
--
mailto:av1474@comtv.ru
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [Qemu-devel] [4932] Preliminary PPC64/Linux host support
2008-07-24 23:33 ` C.W. Betts
@ 2008-07-25 18:18 ` malc
2008-07-26 13:08 ` Andreas Färber
2008-07-26 13:39 ` [Qemu-devel] [4932] Preliminary PPC64/Linux host support Andreas Färber
1 sibling, 1 reply; 29+ messages in thread
From: malc @ 2008-07-25 18:18 UTC (permalink / raw)
To: qemu-devel
On Thu, 24 Jul 2008, C.W. Betts wrote:
> Building it under OS X 10.5.4 doesn't work. After editing the config-host
> files, I get the following:
> In file included from
> /Users/cwbetts/makestuff/qemu-allmac/src/exec-all.h:320,
> from /Users/cwbetts/makestuff/qemu-allmac/src/vl.c:136:
> /Users/cwbetts/makestuff/qemu-allmac/src/qemu-lock.h:216:2: error: #error
> unimplemented CPU support
>
> After adding
> #define __powerpc__ 1
> #define __powerpc64__ 1
> It chokes up under
> In file included from /usr/include/inttypes.h:255,
> from /Users/cwbetts/makestuff/qemu-allmac/src/cpu-defs.h:29,
> from
> /Users/cwbetts/makestuff/qemu-allmac/src/target-i386/exec.h:30,
> from /Users/cwbetts/makestuff/qemu-allmac/src/cpu-exec.c:22:
> /usr/lib/gcc/powerpc-apple-darwin9/4.2.1/include/stdint.h:35: error:
> conflicting types for ?int64_t?
> /Users/cwbetts/makestuff/qemu-allmac/src/dyngen-exec.h:59: error: previous
> declaration of ?int64_t? was here
> /usr/lib/gcc/powerpc-apple-darwin9/4.2.1/include/stdint.h:55: error:
> conflicting types for ?uint64_t?
> /Users/cwbetts/makestuff/qemu-allmac/src/dyngen-exec.h:42: error: previous
> declaration of ?uint64_t? was here
> make: *** [cpu-exec.o] Error 1
Uh, weird, what are [u]int64_t are defined to on darwin?
> I know that this isn't exactly designed for PPC Macs, but the tcg files
> compiled without a problem.
What gives you that idea?
--
mailto:av1474@comtv.ru
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [Qemu-devel] [4932] Preliminary PPC64/Linux host support
2008-07-25 18:18 ` malc
@ 2008-07-26 13:08 ` Andreas Färber
[not found] ` <F41A287D-66CA-42E4-A191-CD5381987301@hotmail.com>
2008-07-26 18:54 ` malc
0 siblings, 2 replies; 29+ messages in thread
From: Andreas Färber @ 2008-07-26 13:08 UTC (permalink / raw)
To: qemu-devel
Am 25.07.2008 um 20:18 schrieb malc:
> On Thu, 24 Jul 2008, C.W. Betts wrote:
>
>> Building it under OS X 10.5.4 doesn't work. After editing the
>> config-host files, I get the following:
>> In file included from /Users/cwbetts/makestuff/qemu-allmac/src/exec-
>> all.h:320,
>> from /Users/cwbetts/makestuff/qemu-allmac/src/vl.c:136:
>> /Users/cwbetts/makestuff/qemu-allmac/src/qemu-lock.h:216:2: error:
>> #error unimplemented CPU support
>>
>> After adding
>> #define __powerpc__ 1
>> #define __powerpc64__ 1
I don't think it's is a good idea to define these as such, it may
confuse other software. You should check the places where they are
used and add appropriate checks for either __ppc__ or __ppc64__
respectively (they are never defined at the same time, contrary to
Linux).
In TCG Spotlight came up only with this:
diff --git a/tcg/tcg.h b/tcg/tcg.h
index bc5b902..860bce9 100644
--- a/tcg/tcg.h
+++ b/tcg/tcg.h
@@ -413,7 +413,7 @@ uint64_t tcg_helper_divu_i64(uint64_t arg1,
uint64_t arg2);
uint64_t tcg_helper_remu_i64(uint64_t arg1, uint64_t arg2);
extern uint8_t code_gen_prologue[];
-#if defined(__powerpc__) && !defined(__powerpc64__)
+#if (defined(__powerpc__) || defined(__ppc__)) && !
defined(__powerpc64__)
#define tcg_qemu_tb_exec(tb_ptr) \
((long REGPARM __attribute__ ((longcall)) (*)(void
*))code_gen_prologue)(tb
#else
and it shouldn't affect ppc64. Not sure if it's needed at all for OSX?
What's it supposed to change?
>> It chokes up under
>> In file included from /usr/include/inttypes.h:255,
>> from /Users/cwbetts/makestuff/qemu-allmac/src/cpu-
>> defs.h:29,
>> from /Users/cwbetts/makestuff/qemu-allmac/src/target-
>> i386/exec.h:30,
>> from /Users/cwbetts/makestuff/qemu-allmac/src/cpu-
>> exec.c:22:
>> /usr/lib/gcc/powerpc-apple-darwin9/4.2.1/include/stdint.h:35:
>> error: conflicting types for ?int64_t?
>> /Users/cwbetts/makestuff/qemu-allmac/src/dyngen-exec.h:59: error:
>> previous declaration of ?int64_t? was here
>> /usr/lib/gcc/powerpc-apple-darwin9/4.2.1/include/stdint.h:55:
>> error: conflicting types for ?uint64_t?
>> /Users/cwbetts/makestuff/qemu-allmac/src/dyngen-exec.h:42: error:
>> previous declaration of ?uint64_t? was here
>> make: *** [cpu-exec.o] Error 1
>
> Uh, weird,
Well, afaik dyngen didn't have support for ppc64...
> what are [u]int64_t are defined to on darwin?
uint64_t is defined to u_int64_t (stdint.h), which is defined to
unsigned long long (ppc/types.h).
int64_t is defined to long long (ppc/types.h).
>> I know that this isn't exactly designed for PPC Macs, but the tcg
>> files compiled without a problem.
>
> What gives you that idea?
He probably meant designed for PPC Mac OS X - you said so, and it
doesn't work yet. See my patch, there are currently numbers hardcoded
for Linux.
Andreas
^ permalink raw reply related [flat|nested] 29+ messages in thread
* Re: [Qemu-devel] [4932] Preliminary PPC64/Linux host support
2008-07-24 23:33 ` C.W. Betts
2008-07-25 18:18 ` malc
@ 2008-07-26 13:39 ` Andreas Färber
[not found] ` <1D9DD99A-96CE-4570-B8EE-428CDBAE5FE3@hotmail.com>
1 sibling, 1 reply; 29+ messages in thread
From: Andreas Färber @ 2008-07-26 13:39 UTC (permalink / raw)
To: qemu-devel
Am 25.07.2008 um 01:33 schrieb C.W. Betts:
> Building it under OS X 10.5.4 doesn't work. After editing the
> config-host files, I get the following:
> In file included from /Users/cwbetts/makestuff/qemu-allmac/src/exec-
> all.h:320,
> from /Users/cwbetts/makestuff/qemu-allmac/src/vl.c:
> 136:
> /Users/cwbetts/makestuff/qemu-allmac/src/qemu-lock.h:216:2: error:
> #error unimplemented CPU support
>
> After adding
> #define __powerpc__ 1
> #define __powerpc64__ 1
> It chokes up under
> In file included from /usr/include/inttypes.h:255,
> from /Users/cwbetts/makestuff/qemu-allmac/src/cpu-
> defs.h:29,
> from /Users/cwbetts/makestuff/qemu-allmac/src/target-
> i386/exec.h:30,
> from /Users/cwbetts/makestuff/qemu-allmac/src/cpu-
> exec.c:22:
> /usr/lib/gcc/powerpc-apple-darwin9/4.2.1/include/stdint.h:35: error:
> conflicting types for ‘int64_t’
> /Users/cwbetts/makestuff/qemu-allmac/src/dyngen-exec.h:59: error:
> previous declaration of ‘int64_t’ was here
> /usr/lib/gcc/powerpc-apple-darwin9/4.2.1/include/stdint.h:55: error:
> conflicting types for ‘uint64_t’
> /Users/cwbetts/makestuff/qemu-allmac/src/dyngen-exec.h:42: error:
> previous declaration of ‘uint64_t’ was here
> make: *** [cpu-exec.o] Error 1
Could you please try if the dyngen-exec.h patch I just posted works
for you?
Andreas
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [Qemu-devel] [4932] Preliminary PPC64/Linux host support
[not found] ` <1D9DD99A-96CE-4570-B8EE-428CDBAE5FE3@hotmail.com>
@ 2008-07-26 17:13 ` C.W. Betts
0 siblings, 0 replies; 29+ messages in thread
From: C.W. Betts @ 2008-07-26 17:13 UTC (permalink / raw)
To: qemu-devel
Yes, it fixes compilation. Thanks.
On Jul 26, 2008, at 7:39 AM, Andreas Färber wrote:
>
> Am 25.07.2008 um 01:33 schrieb C.W. Betts:
>
>> Building it under OS X 10.5.4 doesn't work. After editing the
>> config-host files, I get the following:
>> In file included from /Users/cwbetts/makestuff/qemu-allmac/src/exec-
>> all.h:320,
>> from /Users/cwbetts/makestuff/qemu-allmac/src/vl.c:
>> 136:
>> /Users/cwbetts/makestuff/qemu-allmac/src/qemu-lock.h:216:2: error:
>> #error unimplemented CPU support
>>
>> After adding
>> #define __powerpc__ 1
>> #define __powerpc64__ 1
>
>> It chokes up under
>> In file included from /usr/include/inttypes.h:255,
>> from /Users/cwbetts/makestuff/qemu-allmac/src/cpu-
>> defs.h:29,
>> from /Users/cwbetts/makestuff/qemu-allmac/src/target-
>> i386/exec.h:30,
>> from /Users/cwbetts/makestuff/qemu-allmac/src/cpu-
>> exec.c:22:
>> /usr/lib/gcc/powerpc-apple-darwin9/4.2.1/include/stdint.h:35:
>> error: conflicting types for ‘int64_t’
>> /Users/cwbetts/makestuff/qemu-allmac/src/dyngen-exec.h:59: error:
>> previous declaration of ‘int64_t’ was here
>> /usr/lib/gcc/powerpc-apple-darwin9/4.2.1/include/stdint.h:55:
>> error: conflicting types for ‘uint64_t’
>> /Users/cwbetts/makestuff/qemu-allmac/src/dyngen-exec.h:42: error:
>> previous declaration of ‘uint64_t’ was here
>> make: *** [cpu-exec.o] Error 1
>
> Could you please try if the dyngen-exec.h patch I just posted works
> for you?
>
> Andreas
>
>
>
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [Qemu-devel] [4932] Preliminary PPC64/Linux host support
[not found] ` <F41A287D-66CA-42E4-A191-CD5381987301@hotmail.com>
@ 2008-07-26 17:36 ` C.W. Betts
2008-07-26 18:00 ` Andreas Färber
0 siblings, 1 reply; 29+ messages in thread
From: C.W. Betts @ 2008-07-26 17:36 UTC (permalink / raw)
To: qemu-devel
On Jul 26, 2008, at 7:08 AM, Andreas Färber wrote:
>
> Am 25.07.2008 um 20:18 schrieb malc:
>
>> On Thu, 24 Jul 2008, C.W. Betts wrote:
>>
>>> Building it under OS X 10.5.4 doesn't work. After editing the
>>> config-host files, I get the following:
>>> In file included from /Users/cwbetts/makestuff/qemu-allmac/src/
>>> exec-all.h:320,
>>> from /Users/cwbetts/makestuff/qemu-allmac/src/vl.c:136:
>>> /Users/cwbetts/makestuff/qemu-allmac/src/qemu-lock.h:216:2: error:
>>> #error unimplemented CPU support
>>>
>>> After adding
>>> #define __powerpc__ 1
>>> #define __powerpc64__ 1
>
> I don't think it's is a good idea to define these as such, it may
> confuse other software. You should check the places where they are
> used and add appropriate checks for either __ppc__ or __ppc64__
> respectively (they are never defined at the same time, contrary to
> Linux).
When ARCH=ppc is defined in config-host.mak, it adds -D__powerpc__ to
the compiler command line. However, it doesn't seem to do that when
it is defined as ppc64. I also remember seeing __powerpc64__
mentioned in the patch.
>>> It chokes up under
>>> In file included from /usr/include/inttypes.h:255,
>>> from /Users/cwbetts/makestuff/qemu-allmac/src/cpu-
>>> defs.h:29,
>>> from /Users/cwbetts/makestuff/qemu-allmac/src/target-
>>> i386/exec.h:30,
>>> from /Users/cwbetts/makestuff/qemu-allmac/src/cpu-
>>> exec.c:22:
>>> /usr/lib/gcc/powerpc-apple-darwin9/4.2.1/include/stdint.h:35:
>>> error: conflicting types for ?int64_t?
>>> /Users/cwbetts/makestuff/qemu-allmac/src/dyngen-exec.h:59: error:
>>> previous declaration of ?int64_t? was here
>>> /usr/lib/gcc/powerpc-apple-darwin9/4.2.1/include/stdint.h:55:
>>> error: conflicting types for ?uint64_t?
>>> /Users/cwbetts/makestuff/qemu-allmac/src/dyngen-exec.h:42: error:
>>> previous declaration of ?uint64_t? was here
>>> make: *** [cpu-exec.o] Error 1
>>
>> Uh, weird,
>
> Well, afaik dyngen didn't have support for ppc64...
I usually touch dyngen to make it not compile. I think cpu-exec.c
includes dyngen-exec.h.
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [Qemu-devel] [4932] Preliminary PPC64/Linux host support
2008-07-26 17:36 ` C.W. Betts
@ 2008-07-26 18:00 ` Andreas Färber
0 siblings, 0 replies; 29+ messages in thread
From: Andreas Färber @ 2008-07-26 18:00 UTC (permalink / raw)
To: qemu-devel
[-- Attachment #1: Type: text/plain, Size: 1274 bytes --]
Am 26.07.2008 um 19:36 schrieb C.W. Betts:
>
> On Jul 26, 2008, at 7:08 AM, Andreas Färber wrote:
>
>>
>> Am 25.07.2008 um 20:18 schrieb malc:
>>
>>> On Thu, 24 Jul 2008, C.W. Betts wrote:
>>>
>>>> Building it under OS X 10.5.4 doesn't work. After editing the
>>>> config-host files, I get the following:
>>>> In file included from /Users/cwbetts/makestuff/qemu-allmac/src/
>>>> exec-all.h:320,
>>>> from /Users/cwbetts/makestuff/qemu-allmac/src/vl.c:136:
>>>> /Users/cwbetts/makestuff/qemu-allmac/src/qemu-lock.h:216:2:
>>>> error: #error unimplemented CPU support
>>>>
>>>> After adding
>>>> #define __powerpc__ 1
>>>> #define __powerpc64__ 1
>>
>> I don't think it's is a good idea to define these as such, it may
>> confuse other software. You should check the places where they are
>> used and add appropriate checks for either __ppc__ or __ppc64__
>> respectively (they are never defined at the same time, contrary to
>> Linux).
> When ARCH=ppc is defined in config-host.mak, it adds -D__powerpc__
> to the compiler command line. However, it doesn't seem to do that
> when it is defined as ppc64.
Okay, I found it in Makefile.target. The attached patch should define
them, let me know if it works.
[-- Attachment #2: qemu-osx-ppc64-defines.diff --]
[-- Type: application/octet-stream, Size: 373 bytes --]
diff --git a/Makefile.target b/Makefile.target
index 0c33f85..0d77fce 100644
--- a/Makefile.target
+++ b/Makefile.target
@@ -109,6 +109,10 @@ CPPFLAGS+= -D__powerpc__
OP_CFLAGS+= -mlongcall
endif
+ifeq ($(ARCH),ppc64)
+CPPFLAGS+= -D__powerpc__ -D__powerpc64__
+endif
+
ifeq ($(ARCH),sparc)
CFLAGS+=-ffixed-g2 -ffixed-g3
OP_CFLAGS+=-fno-delayed-branch -ffixed-i0
[-- Attachment #3: Type: text/plain, Size: 365 bytes --]
> I also remember seeing __powerpc64__ mentioned in the patch.
On Linux, both __powerpc__ and __powerpc64__ are defined.
However I'm still not comfortable with defining these because they
might be used to distinguish between Linux and OSX elsewhere. PowerPC
is the only target that does such a hack, so I'd rather eliminate it
than extend it...
Andreas
^ permalink raw reply related [flat|nested] 29+ messages in thread
* Re: [Qemu-devel] [4932] Preliminary PPC64/Linux host support
2008-07-26 13:08 ` Andreas Färber
[not found] ` <F41A287D-66CA-42E4-A191-CD5381987301@hotmail.com>
@ 2008-07-26 18:54 ` malc
2008-07-26 20:42 ` Andreas Färber
1 sibling, 1 reply; 29+ messages in thread
From: malc @ 2008-07-26 18:54 UTC (permalink / raw)
To: qemu-devel
On Sat, 26 Jul 2008, Andreas F?rber wrote:
>
> Am 25.07.2008 um 20:18 schrieb malc:
>
>> On Thu, 24 Jul 2008, C.W. Betts wrote:
>>
>>> Building it under OS X 10.5.4 doesn't work. After editing the config-host
>>> files, I get the following:
>>> In file included from
>>> /Users/cwbetts/makestuff/qemu-allmac/src/exec-all.h:320,
>>> from /Users/cwbetts/makestuff/qemu-allmac/src/vl.c:136:
>>> /Users/cwbetts/makestuff/qemu-allmac/src/qemu-lock.h:216:2: error: #error
>>> unimplemented CPU support
>>>
>>> After adding
>>> #define __powerpc__ 1
>>> #define __powerpc64__ 1
>
> I don't think it's is a good idea to define these as such, it may confuse
> other software. You should check the places where they are used and add
> appropriate checks for either __ppc__ or __ppc64__ respectively (they are
> never defined at the same time, contrary to Linux).
You are replying to both me and C.W. Betts this is somewhat confusing.
> In TCG Spotlight came up only with this:
>
> diff --git a/tcg/tcg.h b/tcg/tcg.h
> index bc5b902..860bce9 100644
> --- a/tcg/tcg.h
> +++ b/tcg/tcg.h
> @@ -413,7 +413,7 @@ uint64_t tcg_helper_divu_i64(uint64_t arg1, uint64_t
> arg2);
> uint64_t tcg_helper_remu_i64(uint64_t arg1, uint64_t arg2);
>
> extern uint8_t code_gen_prologue[];
> -#if defined(__powerpc__) && !defined(__powerpc64__)
> +#if (defined(__powerpc__) || defined(__ppc__)) && !defined(__powerpc64__)
> #define tcg_qemu_tb_exec(tb_ptr) \
> ((long REGPARM __attribute__ ((longcall)) (*)(void
> *))code_gen_prologue)(tb
> #else
>
> and it shouldn't affect ppc64. Not sure if it's needed at all for OSX? What's
> it supposed to change?
>
>>> It chokes up under
>>> In file included from /usr/include/inttypes.h:255,
>>> from /Users/cwbetts/makestuff/qemu-allmac/src/cpu-defs.h:29,
>>> from
>>> /Users/cwbetts/makestuff/qemu-allmac/src/target-i386/exec.h:30,
>>> from /Users/cwbetts/makestuff/qemu-allmac/src/cpu-exec.c:22:
>>> /usr/lib/gcc/powerpc-apple-darwin9/4.2.1/include/stdint.h:35: error:
>>> conflicting types for ?int64_t?
>>> /Users/cwbetts/makestuff/qemu-allmac/src/dyngen-exec.h:59: error: previous
>>> declaration of ?int64_t? was here
>>> /usr/lib/gcc/powerpc-apple-darwin9/4.2.1/include/stdint.h:55: error:
>>> conflicting types for ?uint64_t?
>>> /Users/cwbetts/makestuff/qemu-allmac/src/dyngen-exec.h:42: error: previous
>>> declaration of ?uint64_t? was here
>>> make: *** [cpu-exec.o] Error 1
>>
>> Uh, weird,
>
> Well, afaik dyngen didn't have support for ppc64...
No that's not what i find weird, the weird part is darwin elects to use
(unsigned) long long for (u)int64_t while Linux uses plain longs.
>> what are [u]int64_t are defined to on darwin?
>
> uint64_t is defined to u_int64_t (stdint.h), which is defined to unsigned
> long long (ppc/types.h).
> int64_t is defined to long long (ppc/types.h).
>
>>> I know that this isn't exactly designed for PPC Macs, but the tcg files
>>> compiled without a problem.
>>
>> What gives you that idea?
>
> He probably meant designed for PPC Mac OS X - you said so, and it doesn't
> work yet. See my patch, there are currently numbers hardcoded for Linux.
It's not just about numbers, last time i looked (cursory) the ABIs where
a lot different (PPC32 case) just changing the numbers wont get one very
far i think.
--
mailto:av1474@comtv.ru
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [Qemu-devel] [4932] Preliminary PPC64/Linux host support
2008-07-25 18:15 ` malc
@ 2008-07-26 19:32 ` René Rebe
2008-07-27 18:17 ` malc
0 siblings, 1 reply; 29+ messages in thread
From: René Rebe @ 2008-07-26 19:32 UTC (permalink / raw)
To: qemu-devel
Hi,
malc wrote:
> On Fri, 25 Jul 2008, Ren? Rebe wrote:
>
>> malc wrote:
>>> On Thu, 24 Jul 2008, Ren Rebe wrote:
>>>
>
> [..snip..]
>
>> I gave it a spin yesterday, it built and managed to boot a decent
>> linux-2.6
>> system until the first user-space programs after init where running and
>> segfaulted thereafter.
>
> 'Decent linux-2.6 system'? Recent perhaps? In any case that is strange
> since linux-test image does work here as does ls after booting it (not
> much, i know)
Yes, recent (2.6.2x), of course :-)
>> I'm abroad the next days, but I'll definetly will help (or try to,
>> I'm no
>> yet that into TCG, yet :-) to hunt those segfaults :-)
>
> Thanks, in the meantime can You tell what is that you have unsuccessfully
> tried to boot?
Well it's my standard T2 SDE (http://t2-project.org) test image. Actually it
boots, and quite some user-space is running (statically linked early
userspace of
the initrd for u/dev & co) and then the system init and even mounting the
virtual/pseudo filesystems. It "only" segfaults somewhere soonish after init
is already running and executed the first tasks. So on my side actually
"quite a lot" already worked.
However, I just checked with the qemu:HEAD and the qemu segfault
booting my system is already gone - though it's booting quite slowly :-(
Great work so far!
René
--
René Rebe - ExactCODE GmbH - Europe, Germany, Berlin
http://exactcode.de | http://t2-project.org | http://rene.rebe.name
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [Qemu-devel] [4932] Preliminary PPC64/Linux host support
2008-07-26 18:54 ` malc
@ 2008-07-26 20:42 ` Andreas Färber
2008-07-27 18:14 ` malc
0 siblings, 1 reply; 29+ messages in thread
From: Andreas Färber @ 2008-07-26 20:42 UTC (permalink / raw)
To: qemu-devel
[-- Attachment #1: Type: text/plain, Size: 570 bytes --]
Am 26.07.2008 um 20:54 schrieb malc:
>> there are currently numbers hardcoded for Linux.
>
> It's not just about numbers, last time i looked (cursory) the ABIs
> where
> a lot different (PPC32 case) just changing the numbers wont get one
> very
> far i think.
Of course not only, but it's one step that could be applied. The stack
alignment is 16 Bytes for both, and the prolog in my ppc(32) branch
seems to match the referenced Apple pseudocode now.
Where else do you have differences in mind? Which additional functions
may need to be adjusted?
Andreas
[-- Attachment #2: qemu-osx-ppc-tcg-2008-07-26b.diff --]
[-- Type: application/octet-stream, Size: 3005 bytes --]
diff --git a/tcg/ppc/tcg-target.c b/tcg/ppc/tcg-target.c
index 7dfb17f..3ebe68c 100644
--- a/tcg/ppc/tcg-target.c
+++ b/tcg/ppc/tcg-target.c
@@ -806,23 +806,22 @@ void tcg_target_qemu_prologue (TCGContext *s)
int i, frame_size;
frame_size = 0
- + 4 /* back chain */
- + 4 /* LR */
+ + TCG_TARGET_CALL_STACK_OFFSET
+ TCG_STATIC_CALL_ARGS_SIZE
+ ARRAY_SIZE (tcg_target_callee_save_regs) * 4
;
frame_size = (frame_size + 15) & ~15;
tcg_out32 (s, MFSPR | RT (0) | LR);
+ tcg_out32 (s, STW | RS (0) | RA (1) | (TCG_TARGET_CALL_LR_OFFSET));
tcg_out32 (s, STWU | RS (1) | RA (1) | (-frame_size & 0xffff));
for (i = 0; i < ARRAY_SIZE (tcg_target_callee_save_regs); ++i)
tcg_out32 (s, (STW
| RS (tcg_target_callee_save_regs[i])
| RA (1)
- | (i * 4 + 8 + TCG_STATIC_CALL_ARGS_SIZE)
+ | (TCG_TARGET_CALL_STACK_OFFSET + TCG_STATIC_CALL_ARGS_SIZE + i * 4)
)
);
- tcg_out32 (s, STW | RS (0) | RA (1) | (frame_size + 4));
tcg_out32 (s, MTSPR | RS (3) | CTR);
tcg_out32 (s, BCCTR | BO_ALWAYS);
@@ -832,10 +831,10 @@ void tcg_target_qemu_prologue (TCGContext *s)
tcg_out32 (s, (LWZ
| RT (tcg_target_callee_save_regs[i])
| RA (1)
- | (i * 4 + 8 + TCG_STATIC_CALL_ARGS_SIZE)
+ | (TCG_TARGET_CALL_STACK_OFFSET + TCG_STATIC_CALL_ARGS_SIZE + i * 4)
)
);
- tcg_out32 (s, LWZ | RT (0) | RA (1) | (frame_size + 4));
+ tcg_out32 (s, LWZ | RT (0) | RA (1) | (frame_size + TCG_TARGET_CALL_LR_OFFSET));
tcg_out32 (s, MTSPR | RS (0) | LR);
tcg_out32 (s, ADDI | RT (1) | RA (1) | frame_size);
tcg_out32 (s, BCLR | BO_ALWAYS);
diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h
index e21b992..7e2c8bd 100644
--- a/tcg/ppc/tcg-target.h
+++ b/tcg/ppc/tcg-target.h
@@ -65,7 +65,13 @@ enum {
/* used for function call generation */
#define TCG_REG_CALL_STACK TCG_REG_R1
#define TCG_TARGET_STACK_ALIGN 16
+#ifdef __APPLE__
+#define TCG_TARGET_CALL_STACK_OFFSET 24
+#define TCG_TARGET_CALL_LR_OFFSET 8
+#else
#define TCG_TARGET_CALL_STACK_OFFSET 8
+#define TCG_TARGET_CALL_LR_OFFSET 4
+#endif
#define TCG_TARGET_CALL_ALIGN_ARGS 1
/* optional instructions */
diff --git a/tcg/tcg.h b/tcg/tcg.h
index bc5b902..860bce9 100644
--- a/tcg/tcg.h
+++ b/tcg/tcg.h
@@ -413,7 +413,7 @@ uint64_t tcg_helper_divu_i64(uint64_t arg1, uint64_t arg2);
uint64_t tcg_helper_remu_i64(uint64_t arg1, uint64_t arg2);
extern uint8_t code_gen_prologue[];
-#if defined(__powerpc__) && !defined(__powerpc64__)
+#if (defined(__powerpc__) || defined(__ppc__)) && !defined(__powerpc64__)
#define tcg_qemu_tb_exec(tb_ptr) \
((long REGPARM __attribute__ ((longcall)) (*)(void *))code_gen_prologue)(tb_ptr)
#else
[-- Attachment #3: Type: text/plain, Size: 1 bytes --]
^ permalink raw reply related [flat|nested] 29+ messages in thread
* Re: [Qemu-devel] [4932] Preliminary PPC64/Linux host support
2008-07-26 20:42 ` Andreas Färber
@ 2008-07-27 18:14 ` malc
2008-07-29 16:28 ` [Qemu-devel] Mac OS X PPC host support (was: [4932] Preliminary PPC64/Linux host support) Andreas Färber
0 siblings, 1 reply; 29+ messages in thread
From: malc @ 2008-07-27 18:14 UTC (permalink / raw)
To: qemu-devel
On Sat, 26 Jul 2008, Andreas F?rber wrote:
>
> Am 26.07.2008 um 20:54 schrieb malc:
>
>>> there are currently numbers hardcoded for Linux.
>>
>> It's not just about numbers, last time i looked (cursory) the ABIs where
>> a lot different (PPC32 case) just changing the numbers wont get one very
>> far i think.
>
> Of course not only, but it's one step that could be applied. The stack
> alignment is 16 Bytes for both, and the prolog in my ppc(32) branch seems to
> match the referenced Apple pseudocode now.
>
> Where else do you have differences in mind? Which additional functions may
> need to be adjusted?
I'd have to check Darwins ABI to be sure, but here's the short list:
a. Alignement of 64 bit arguments (in the register file)
(This was the thing that confused Sparcs ASI helpers when i first
tried to boot Sparc on, then new, PPC32 tcg)
b. List of reserved registers
c. The approach to TOC (or however Apple calls the substitute)
In any case, PPC32 + MacOS X i can help with. PPC64 + MacOS X not so much.
--
mailto:av1474@comtv.ru
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [Qemu-devel] [4932] Preliminary PPC64/Linux host support
2008-07-26 19:32 ` René Rebe
@ 2008-07-27 18:17 ` malc
0 siblings, 0 replies; 29+ messages in thread
From: malc @ 2008-07-27 18:17 UTC (permalink / raw)
To: qemu-devel
On Sat, 26 Jul 2008, Ren? Rebe wrote:
> Hi,
>
> malc wrote:
>> On Fri, 25 Jul 2008, Ren? Rebe wrote:
>>
>>> malc wrote:
>>>> On Thu, 24 Jul 2008, Ren Rebe wrote:
>>>>
>>
>> [..snip..]
>>
>>> I gave it a spin yesterday, it built and managed to boot a decent
>>> linux-2.6
>>> system until the first user-space programs after init where running and
>>> segfaulted thereafter.
>>
>> 'Decent linux-2.6 system'? Recent perhaps? In any case that is strange
>> since linux-test image does work here as does ls after booting it (not
>> much, i know)
> Yes, recent (2.6.2x), of course :-)
>
>>> I'm abroad the next days, but I'll definetly will help (or try to, I'm no
>>> yet that into TCG, yet :-) to hunt those segfaults :-)
>>
>> Thanks, in the meantime can You tell what is that you have unsuccessfully
>> tried to boot?
> Well it's my standard T2 SDE (http://t2-project.org) test image. Actually it
> boots, and quite some user-space is running (statically linked early
> userspace of
> the initrd for u/dev & co) and then the system init and even mounting the
> virtual/pseudo filesystems. It "only" segfaults somewhere soonish after init
> is already running and executed the first tasks. So on my side actually
> "quite a lot" already worked.
>
> However, I just checked with the qemu:HEAD and the qemu segfault
> booting my system is already gone - though it's booting quite slowly :-(
Compared to what?
[...snip..]
--
mailto:av1474@comtv.ru
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [Qemu-devel] Mac OS X PPC host support (was: [4932] Preliminary PPC64/Linux host support)
2008-07-27 18:14 ` malc
@ 2008-07-29 16:28 ` Andreas Färber
2008-07-29 20:23 ` malc
0 siblings, 1 reply; 29+ messages in thread
From: Andreas Färber @ 2008-07-29 16:28 UTC (permalink / raw)
To: qemu-devel
Am 27.07.2008 um 20:14 schrieb malc:
> On Sat, 26 Jul 2008, Andreas F?rber wrote:
>
>>
>> Am 26.07.2008 um 20:54 schrieb malc:
>>
>>>> there are currently numbers hardcoded for Linux.
>>> It's not just about numbers, last time i looked (cursory) the ABIs
>>> where
>>> a lot different (PPC32 case) just changing the numbers wont get
>>> one very
>>> far i think.
>>
>> Of course not only, but it's one step that could be applied. The
>> stack alignment is 16 Bytes for both, and the prolog in my ppc(32)
>> branch seems to match the referenced Apple pseudocode now.
>>
>> Where else do you have differences in mind? Which additional
>> functions may need to be adjusted?
>
> I'd have to check Darwins ABI to be sure, but here's the short list:
http://developer.apple.com/documentation/DeveloperTools/Conceptual/LowLevelABI/Articles/32bitPowerPC.html
> a. Alignement of 64 bit arguments (in the register file)
> (This was the thing that confused Sparcs ASI helpers when i first
> tried to boot Sparc on, then new, PPC32 tcg)
What register file? Please be more detailed, I'm not intimate with TCG.
> b. List of reserved registers
According to the Apple ppc ABI document, r2 is not system-reserved
compared to SVR4 ppc ABI. The other general-purpose registers look
similar (assuming we don't have nested functions), although Apple
seems to have less strict prescriptions what to store where.
> c. The approach to TOC (or however Apple calls the substitute)
Not sure what you mean. Pointers to concrete files and functions might
help.
> In any case, PPC32 + MacOS X i can help with. PPC64 + MacOS X not so
> much.
Restoring Mac OS X ppc(32) to work again would be just great.
PPC64 didn't work pre-TCG. We'll probably know where to poke ourselves
once ppc is running.
Andreas
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [Qemu-devel] Mac OS X PPC host support (was: [4932] Preliminary PPC64/Linux host support)
2008-07-29 16:28 ` [Qemu-devel] Mac OS X PPC host support (was: [4932] Preliminary PPC64/Linux host support) Andreas Färber
@ 2008-07-29 20:23 ` malc
2008-07-30 18:45 ` Blue Swirl
0 siblings, 1 reply; 29+ messages in thread
From: malc @ 2008-07-29 20:23 UTC (permalink / raw)
To: qemu-devel
On Tue, 29 Jul 2008, Andreas F?rber wrote:
>
> Am 27.07.2008 um 20:14 schrieb malc:
>
>> On Sat, 26 Jul 2008, Andreas F?rber wrote:
>>
>>>
>>> Am 26.07.2008 um 20:54 schrieb malc:
>>>
>>>>> there are currently numbers hardcoded for Linux.
>>>> It's not just about numbers, last time i looked (cursory) the ABIs where
>>>> a lot different (PPC32 case) just changing the numbers wont get one very
>>>> far i think.
>>>
>>> Of course not only, but it's one step that could be applied. The stack
>>> alignment is 16 Bytes for both, and the prolog in my ppc(32) branch seems
>>> to match the referenced Apple pseudocode now.
>>>
>>> Where else do you have differences in mind? Which additional functions may
>>> need to be adjusted?
>>
>> I'd have to check Darwins ABI to be sure, but here's the short list:
>
> http://developer.apple.com/documentation/DeveloperTools/Conceptual/LowLevelABI/Articles/32bitPowerPC.html
>
>> a. Alignement of 64 bit arguments (in the register file)
>> (This was the thing that confused Sparcs ASI helpers when i first
>> tried to boot Sparc on, then new, PPC32 tcg)
>
> What register file? Please be more detailed, I'm not intimate with TCG.
I meant this http://en.wikipedia.org/wiki/Register_file
But anyhow it is not aligned hence the ASI failure You saw earlier.
>> b. List of reserved registers
>
> According to the Apple ppc ABI document, r2 is not system-reserved compared
> to SVR4 ppc ABI. The other general-purpose registers look similar (assuming
> we don't have nested functions), although Apple seems to have less strict
> prescriptions what to store where.
>
>> c. The approach to TOC (or however Apple calls the substitute)
>
> Not sure what you mean. Pointers to concrete files and functions might help.
I have checked and MacOS X on PPC32 doesn't use those.
>
>> In any case, PPC32 + MacOS X i can help with. PPC64 + MacOS X not so much.
>
> Restoring Mac OS X ppc(32) to work again would be just great.
> PPC64 didn't work pre-TCG. We'll probably know where to poke ourselves once
> ppc is running.
I have made a stab at making it work and tried it on MacOS X (Tiger) that
i have here, for Sparc it progress a bit further but still meets it's doom
shortly:
qemu: fatal: Trap 0x29 while interrupts disabled, Error state
pc: ffd04020 npc: ffd04024
General Registers:
%g0: 00000000 %g1: 00000000 %g2: ffd908e0 %g3: ffd00000
%g4: ffd83038 %g5: 00000001 %g6: 00000000 %g7: 00000000
Current Register Window:
%o0: 00000000 %o1: 00000000 %o2: 00000000 %o3: 00000000
%o4: 00000000 %o5: 00000000 %o6: ffdd3fa0 %o7: 00000000
%l0: 00000000 %l1: 00000000 %l2: 00000000 %l3: 00000000
%l4: 00000000 %l5: 00000000 %l6: 00000000 %l7: 00000000
%i0: 00000000 %i1: 00000000 %i2: 00000000 %i3: 00000000
%i4: 00000000 %i5: 00000000 %i6: 00000000 %i7: 00000000
Floating Point Registers:
[all bit zero FPRs snipped]
psr: 0x04001fc0 -> ---- SP- wim: 0x00000001
fsr: 0x00080000
BlueSwirl, rings any bells?
I tried my best to hack it while in Mac OSX, but, honestly, i can not
stand that system and have no spare (quiet enough) machine to SSH into
it and do things remotely, sorry.
The code is available at:
http://repo.or.cz/w/qemu/malc.git?a=shortlog;h=refs/heads/tcgppc32macosx
--
mailto:av1474@comtv.ru
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [Qemu-devel] Mac OS X PPC host support (was: [4932] Preliminary PPC64/Linux host support)
2008-07-29 20:23 ` malc
@ 2008-07-30 18:45 ` Blue Swirl
2008-07-31 17:15 ` malc
2008-07-31 18:57 ` malc
0 siblings, 2 replies; 29+ messages in thread
From: Blue Swirl @ 2008-07-30 18:45 UTC (permalink / raw)
To: qemu-devel
On 7/29/08, malc <av1474@comtv.ru> wrote:
> I have made a stab at making it work and tried it on MacOS X (Tiger) that
> i have here, for Sparc it progress a bit further but still meets it's doom
> shortly:
>
> qemu: fatal: Trap 0x29 while interrupts disabled, Error state
> pc: ffd04020 npc: ffd04024
> General Registers:
> %g0: 00000000 %g1: 00000000 %g2: ffd908e0 %g3: ffd00000
> %g4: ffd83038 %g5: 00000001 %g6: 00000000 %g7: 00000000
> Current Register Window:
> %o0: 00000000 %o1: 00000000 %o2: 00000000 %o3: 00000000
> %o4: 00000000 %o5: 00000000 %o6: ffdd3fa0 %o7: 00000000
> %l0: 00000000 %l1: 00000000 %l2: 00000000 %l3: 00000000
> %l4: 00000000 %l5: 00000000 %l6: 00000000 %l7: 00000000
> %i0: 00000000 %i1: 00000000 %i2: 00000000 %i3: 00000000
> %i4: 00000000 %i5: 00000000 %i6: 00000000 %i7: 00000000
>
> Floating Point Registers:
> [all bit zero FPRs snipped]
> psr: 0x04001fc0 -> ---- SP- wim: 0x00000001
> fsr: 0x00080000
>
> BlueSwirl, rings any bells?
29 is Data Access Exception, raised from unassigned memory access. The code is
0xffd04020: std %l0, [ %sp ]
which is a double word store. Address in %sp (%o6, 0xffdd3fa0) is OK.
So I'd check if qemu_st64 generates correct code.
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [Qemu-devel] Mac OS X PPC host support (was: [4932] Preliminary PPC64/Linux host support)
2008-07-30 18:45 ` Blue Swirl
@ 2008-07-31 17:15 ` malc
2008-07-31 18:57 ` malc
1 sibling, 0 replies; 29+ messages in thread
From: malc @ 2008-07-31 17:15 UTC (permalink / raw)
To: qemu-devel
On Wed, 30 Jul 2008, Blue Swirl wrote:
> On 7/29/08, malc <av1474@comtv.ru> wrote:
>> I have made a stab at making it work and tried it on MacOS X (Tiger) that
>> i have here, for Sparc it progress a bit further but still meets it's doom
>> shortly:
>>
>> qemu: fatal: Trap 0x29 while interrupts disabled, Error state
>> pc: ffd04020 npc: ffd04024
>> General Registers:
>> %g0: 00000000 %g1: 00000000 %g2: ffd908e0 %g3: ffd00000
>> %g4: ffd83038 %g5: 00000001 %g6: 00000000 %g7: 00000000
>> Current Register Window:
>> %o0: 00000000 %o1: 00000000 %o2: 00000000 %o3: 00000000
>> %o4: 00000000 %o5: 00000000 %o6: ffdd3fa0 %o7: 00000000
>> %l0: 00000000 %l1: 00000000 %l2: 00000000 %l3: 00000000
>> %l4: 00000000 %l5: 00000000 %l6: 00000000 %l7: 00000000
>> %i0: 00000000 %i1: 00000000 %i2: 00000000 %i3: 00000000
>> %i4: 00000000 %i5: 00000000 %i6: 00000000 %i7: 00000000
>>
>> Floating Point Registers:
>> [all bit zero FPRs snipped]
>> psr: 0x04001fc0 -> ---- SP- wim: 0x00000001
>> fsr: 0x00080000
>>
>> BlueSwirl, rings any bells?
>
> 29 is Data Access Exception, raised from unassigned memory access. The code is
>
> 0xffd04020: std %l0, [ %sp ]
>
> which is a double word store. Address in %sp (%o6, 0xffdd3fa0) is OK.
> So I'd check if qemu_st64 generates correct code.
Thanks, i'll look into this if i found courage to boot into MacOS X again.
--
mailto:av1474@comtv.ru
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [Qemu-devel] Mac OS X PPC host support (was: [4932] Preliminary PPC64/Linux host support)
2008-07-30 18:45 ` Blue Swirl
2008-07-31 17:15 ` malc
@ 2008-07-31 18:57 ` malc
2008-07-31 21:50 ` Andreas Färber
1 sibling, 1 reply; 29+ messages in thread
From: malc @ 2008-07-31 18:57 UTC (permalink / raw)
To: qemu-devel
On Wed, 30 Jul 2008, Blue Swirl wrote:
> On 7/29/08, malc <av1474@comtv.ru> wrote:
>> I have made a stab at making it work and tried it on MacOS X (Tiger) that
>> i have here, for Sparc it progress a bit further but still meets it's doom
>> shortly:
>>
>> qemu: fatal: Trap 0x29 while interrupts disabled, Error state
>> pc: ffd04020 npc: ffd04024
>> General Registers:
>> %g0: 00000000 %g1: 00000000 %g2: ffd908e0 %g3: ffd00000
>> %g4: ffd83038 %g5: 00000001 %g6: 00000000 %g7: 00000000
>> Current Register Window:
>> %o0: 00000000 %o1: 00000000 %o2: 00000000 %o3: 00000000
>> %o4: 00000000 %o5: 00000000 %o6: ffdd3fa0 %o7: 00000000
>> %l0: 00000000 %l1: 00000000 %l2: 00000000 %l3: 00000000
>> %l4: 00000000 %l5: 00000000 %l6: 00000000 %l7: 00000000
>> %i0: 00000000 %i1: 00000000 %i2: 00000000 %i3: 00000000
>> %i4: 00000000 %i5: 00000000 %i6: 00000000 %i7: 00000000
>>
>> Floating Point Registers:
>> [all bit zero FPRs snipped]
>> psr: 0x04001fc0 -> ---- SP- wim: 0x00000001
>> fsr: 0x00080000
>>
>> BlueSwirl, rings any bells?
>
> 29 is Data Access Exception, raised from unassigned memory access. The code is
>
> 0xffd04020: std %l0, [ %sp ]
>
> which is a double word store. Address in %sp (%o6, 0xffdd3fa0) is OK.
> So I'd check if qemu_st64 generates correct code.
That was spot on, thanks once again. I have notified main tcg proper to
not align register parameters, but failed to do so myself when calling
qemu_stXX helpers.
With that fixed Sparc test image boots in MacOS X, i386 test image does
make it to ext2fs warning but then just hangs there waiting for something,
and some dma timer warning messages popup in the console after a while,
therefore i'm reluctant on commiting it just now.
That said the code is there:
http://repo.or.cz/w/qemu/malc.git?a=shortlog;h=refs/heads/tcgppc32macosx
(warning, one commit was amended so things will not fast-forward)
My MacOS X stuff is outdated so maybe the i386 problem is not a TCG one,
testing from uptodate MacOS X/PPC32 people would be needed. And i think
someone more MacOS X inclined should take over this part.
--
mailto:av1474@comtv.ru
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [Qemu-devel] Mac OS X PPC host support (was: [4932] Preliminary PPC64/Linux host support)
2008-07-31 18:57 ` malc
@ 2008-07-31 21:50 ` Andreas Färber
2008-08-01 18:52 ` malc
2008-08-02 16:35 ` Andreas Färber
0 siblings, 2 replies; 29+ messages in thread
From: Andreas Färber @ 2008-07-31 21:50 UTC (permalink / raw)
To: qemu-devel
Am 31.07.2008 um 20:57 schrieb malc:
> On Wed, 30 Jul 2008, Blue Swirl wrote:
>
>> 29 is Data Access Exception, raised from unassigned memory access.
>> The code is
>>
>> 0xffd04020: std %l0, [ %sp ]
>>
>> which is a double word store. Address in %sp (%o6, 0xffdd3fa0) is OK.
>> So I'd check if qemu_st64 generates correct code.
>
> That was spot on, thanks once again. I have notified main tcg proper
> to
> not align register parameters, but failed to do so myself when calling
> qemu_stXX helpers.
>
> With that fixed Sparc test image boots in MacOS X, i386 test image
> does
> make it to ext2fs warning but then just hangs there waiting for
> something,
> and some dma timer warning messages popup in the console after a
> while,
> therefore i'm reluctant on commiting it just now.
>
> That said the code is there:
> http://repo.or.cz/w/qemu/malc.git?a=shortlog;h=refs/heads/tcgppc32macosx
> (warning, one commit was amended so things will not fast-forward)
>
> My MacOS X stuff is outdated so maybe the i386 problem is not a TCG
> one,
> testing from uptodate MacOS X/PPC32 people would be needed. And i
> think
> someone more MacOS X inclined should take over this part.
I still think your Apple linkage area define is incorrect. The ABI
document clearly says it's 24 bytes, with some reserved space in there
after the three fields. You sure it's safe to strip that space?
Leaving my linkage area in and applying your alignment fixes I was
finally able to boot into Sparc Etch.
http://repo.or.cz/w/qemu/afaerber.git?a=shortlog;h=refs/heads/tcg-osx-ppc
Thanks a lot for your help so far!
After some progress on booting, I get a whole screen full of "esp0:
Data transfer overrun." - sounds related to your i386 issue. The
monitor is awfully slow at that point, i.e. ~1 second per char typed.
Last time I saw these, something was wrong in slavio interrupt
handling I believe - haven't checked on another platform yet.
Andreas
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [Qemu-devel] Mac OS X PPC host support (was: [4932] Preliminary PPC64/Linux host support)
2008-07-31 21:50 ` Andreas Färber
@ 2008-08-01 18:52 ` malc
2008-08-02 21:29 ` Andreas Färber
2008-08-02 16:35 ` Andreas Färber
1 sibling, 1 reply; 29+ messages in thread
From: malc @ 2008-08-01 18:52 UTC (permalink / raw)
To: qemu-devel
On Thu, 31 Jul 2008, Andreas F?rber wrote:
>
> Am 31.07.2008 um 20:57 schrieb malc:
>
>> On Wed, 30 Jul 2008, Blue Swirl wrote:
>>
[..snip..]
>>
>> My MacOS X stuff is outdated so maybe the i386 problem is not a TCG one,
>> testing from uptodate MacOS X/PPC32 people would be needed. And i think
>> someone more MacOS X inclined should take over this part.
>
>
> I still think your Apple linkage area define is incorrect. The ABI document
> clearly says it's 24 bytes, with some reserved space in there after the three
> fields. You sure it's safe to strip that space?
Yes, you are right i missed the 'Note: ...' part.
> Leaving my linkage area in and applying your alignment fixes I was finally
> able to boot into Sparc Etch.
> http://repo.or.cz/w/qemu/afaerber.git?a=shortlog;h=refs/heads/tcg-osx-ppc
>
> Thanks a lot for your help so far!
You are welcome, but this is most likely as far as i can ever get, to
reiterate: MacOS X is too foreign for me and working in it is a great
pain - sorry.
> After some progress on booting, I get a whole screen full of "esp0: Data
> transfer overrun." - sounds related to your i386 issue. The monitor is
> awfully slow at that point, i.e. ~1 second per char typed. Last time I saw
> these, something was wrong in slavio interrupt handling I believe - haven't
> checked on another platform yet.
Can you try i386 testimage (http://bellard.org/qemu/linux-0.2.img.bz2)?
Does it behave the same as on my box?
--
mailto:av1474@comtv.ru
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [Qemu-devel] Mac OS X PPC host support (was: [4932] Preliminary PPC64/Linux host support)
2008-07-31 21:50 ` Andreas Färber
2008-08-01 18:52 ` malc
@ 2008-08-02 16:35 ` Andreas Färber
[not found] ` <E3E8B39E-1924-465D-AA4A-9250D835C932@hotmail.com>
1 sibling, 1 reply; 29+ messages in thread
From: Andreas Färber @ 2008-08-02 16:35 UTC (permalink / raw)
To: qemu-devel
Am 31.07.2008 um 23:50 schrieb Andreas Färber:
> After some progress on booting, I get a whole screen full of "esp0:
> Data transfer overrun."
Yesterday I managed to boot up and work with sparc-softmmu on OSX/ppc
just fine. What was different was that on first try it ran fsck for
sda2 and probably got hung during that, on second try it ran fsck for
sda2 and then for sda1 and failed shortly after. Since then I have not
seen these issues again, neither on OSX/ppc nor an Solaris/amd64. So
maybe it's just a problem when under stress.
Andreas
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [Qemu-devel] Mac OS X PPC host support (was: [4932] Preliminary PPC64/Linux host support)
[not found] ` <E3E8B39E-1924-465D-AA4A-9250D835C932@hotmail.com>
@ 2008-08-02 19:43 ` C.W. Betts
0 siblings, 0 replies; 29+ messages in thread
From: C.W. Betts @ 2008-08-02 19:43 UTC (permalink / raw)
To: qemu-devel
I have a feeling that Sparc tcg target might have a problem under
load. The same thing happened under Mac OS X X86-64, as well as
i386. I doubt this is a problem with OS X.
On Aug 2, 2008, at 10:35 AM, Andreas Färber wrote:
>
> Am 31.07.2008 um 23:50 schrieb Andreas Färber:
>
>> After some progress on booting, I get a whole screen full of "esp0:
>> Data transfer overrun."
>
>
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [Qemu-devel] Mac OS X PPC host support (was: [4932] Preliminary PPC64/Linux host support)
2008-08-01 18:52 ` malc
@ 2008-08-02 21:29 ` Andreas Färber
2008-08-03 18:56 ` malc
0 siblings, 1 reply; 29+ messages in thread
From: Andreas Färber @ 2008-08-02 21:29 UTC (permalink / raw)
To: qemu-devel
Am 01.08.2008 um 20:52 schrieb malc:
> Can you try i386 testimage (http://bellard.org/qemu/
> linux-0.2.img.bz2)?
> Does it behave the same as on my box?
It boots up okay for me. I did not notice an ext2fs warning or a hang,
other than waiting half a second for the screen refresh after emitting
one line of console text (not comparable to sparc-softmmu or pre-TCG
afair). But there is an error "vmport: Unknown command 13" in the
Terminal.
Andreas
^ permalink raw reply [flat|nested] 29+ messages in thread
* Re: [Qemu-devel] Mac OS X PPC host support (was: [4932] Preliminary PPC64/Linux host support)
2008-08-02 21:29 ` Andreas Färber
@ 2008-08-03 18:56 ` malc
0 siblings, 0 replies; 29+ messages in thread
From: malc @ 2008-08-03 18:56 UTC (permalink / raw)
To: qemu-devel
On Sat, 2 Aug 2008, Andreas F?rber wrote:
>
> Am 01.08.2008 um 20:52 schrieb malc:
>
>> Can you try i386 testimage (http://bellard.org/qemu/linux-0.2.img.bz2)?
>> Does it behave the same as on my box?
>
> It boots up okay for me. I did not notice an ext2fs warning or a hang, other
> than waiting half a second for the screen refresh after emitting one line of
> console text (not comparable to sparc-softmmu or pre-TCG afair). But there is
> an error "vmport: Unknown command 13" in the Terminal.
I've tried last pre-tcg QEMU checkout and it behaves the same (i.e. hangs
there after ext2fs warning), therefore it's probably safe to conclude that
tcg per se has little to do with it, thanks for testing.
And vmport is just the fallout of recently added vmware backdoor thing.
--
mailto:av1474@comtv.ru
^ permalink raw reply [flat|nested] 29+ messages in thread
end of thread, other threads:[~2008-08-03 18:57 UTC | newest]
Thread overview: 29+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2008-07-23 19:17 [Qemu-devel] [4932] Preliminary PPC64/Linux host support malc
2008-07-24 6:01 ` René Rebe
2008-07-24 17:41 ` malc
2008-07-24 18:42 ` Andreas Färber
2008-07-25 8:41 ` René Rebe
2008-07-25 18:15 ` malc
2008-07-26 19:32 ` René Rebe
2008-07-27 18:17 ` malc
[not found] ` <1964D914-95C1-4A3E-AE40-2DE082D40C24@hotmail.com>
2008-07-24 23:33 ` C.W. Betts
2008-07-25 18:18 ` malc
2008-07-26 13:08 ` Andreas Färber
[not found] ` <F41A287D-66CA-42E4-A191-CD5381987301@hotmail.com>
2008-07-26 17:36 ` C.W. Betts
2008-07-26 18:00 ` Andreas Färber
2008-07-26 18:54 ` malc
2008-07-26 20:42 ` Andreas Färber
2008-07-27 18:14 ` malc
2008-07-29 16:28 ` [Qemu-devel] Mac OS X PPC host support (was: [4932] Preliminary PPC64/Linux host support) Andreas Färber
2008-07-29 20:23 ` malc
2008-07-30 18:45 ` Blue Swirl
2008-07-31 17:15 ` malc
2008-07-31 18:57 ` malc
2008-07-31 21:50 ` Andreas Färber
2008-08-01 18:52 ` malc
2008-08-02 21:29 ` Andreas Färber
2008-08-03 18:56 ` malc
2008-08-02 16:35 ` Andreas Färber
[not found] ` <E3E8B39E-1924-465D-AA4A-9250D835C932@hotmail.com>
2008-08-02 19:43 ` C.W. Betts
2008-07-26 13:39 ` [Qemu-devel] [4932] Preliminary PPC64/Linux host support Andreas Färber
[not found] ` <1D9DD99A-96CE-4570-B8EE-428CDBAE5FE3@hotmail.com>
2008-07-26 17:13 ` C.W. Betts
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