From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1KhWjm-00010t-1i for qemu-devel@nongnu.org; Sun, 21 Sep 2008 17:45:02 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1KhWjk-00010Y-V3 for qemu-devel@nongnu.org; Sun, 21 Sep 2008 17:45:01 -0400 Received: from [199.232.76.173] (port=43811 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1KhWjk-00010V-Nz for qemu-devel@nongnu.org; Sun, 21 Sep 2008 17:45:00 -0400 Received: from fe01x03-cgp.akado.ru ([77.232.31.164]:57308 helo=akado.ru) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1KhWjj-0005R8-Ue for qemu-devel@nongnu.org; Sun, 21 Sep 2008 17:45:00 -0400 Received: from av1474.oops ([10.0.66.9] verified) by fe01-cgp.akado.ru (CommuniGate Pro SMTP 5.1.16) with ESMTPS id 31486004 for qemu-devel@nongnu.org; Mon, 22 Sep 2008 01:44:56 +0400 Date: Mon, 22 Sep 2008 01:44:55 +0400 (MSD) From: malc Subject: Re: [Qemu-devel] x86 MMX register access problem seen on Sparc host In-Reply-To: Message-ID: References: MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII; format=flowed Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel On Mon, 22 Sep 2008, malc wrote: > On Sun, 21 Sep 2008, Blue Swirl wrote: > >> Hi, >> >> I get these warnings when compiling i386 targets on Sparc host using a >> gcc 4.3 series compiler: >> /src/qemu/target-i386/ops_sse.h: In function 'helper_pmovmskb_mmx': >> /src/qemu/target-i386/ops_sse.h:982: warning: array subscript is above >> array bounds >> etc. >> >> The first line is the following: >> val |= (s->XMM_B(0) >> 7); > > All the lines before #if SHIFT == 1 should be MMX_B really. Scratch that. It should be this instead: diff --git a/target-i386/ops_sse.h b/target-i386/ops_sse.h index 7568681..2b594db 100644 --- a/target-i386/ops_sse.h +++ b/target-i386/ops_sse.h @@ -979,23 +979,23 @@ uint32_t glue(helper_pmovmskb, SUFFIX)(Reg *s) { uint32_t val; val = 0; - val |= (s->XMM_B(0) >> 7); - val |= (s->XMM_B(1) >> 6) & 0x02; - val |= (s->XMM_B(2) >> 5) & 0x04; - val |= (s->XMM_B(3) >> 4) & 0x08; - val |= (s->XMM_B(4) >> 3) & 0x10; - val |= (s->XMM_B(5) >> 2) & 0x20; - val |= (s->XMM_B(6) >> 1) & 0x40; - val |= (s->XMM_B(7)) & 0x80; + val |= (s->B(0) >> 7); + val |= (s->B(1) >> 6) & 0x02; + val |= (s->B(2) >> 5) & 0x04; + val |= (s->B(3) >> 4) & 0x08; + val |= (s->B(4) >> 3) & 0x10; + val |= (s->B(5) >> 2) & 0x20; + val |= (s->B(6) >> 1) & 0x40; + val |= (s->B(7)) & 0x80; #if SHIFT == 1 - val |= (s->XMM_B(8) << 1) & 0x0100; - val |= (s->XMM_B(9) << 2) & 0x0200; - val |= (s->XMM_B(10) << 3) & 0x0400; - val |= (s->XMM_B(11) << 4) & 0x0800; - val |= (s->XMM_B(12) << 5) & 0x1000; - val |= (s->XMM_B(13) << 6) & 0x2000; - val |= (s->XMM_B(14) << 7) & 0x4000; - val |= (s->XMM_B(15) << 8) & 0x8000; + val |= (s->B(8) << 1) & 0x0100; + val |= (s->B(9) << 2) & 0x0200; + val |= (s->B(10) << 3) & 0x0400; + val |= (s->B(11) << 4) & 0x0800; + val |= (s->B(12) << 5) & 0x1000; + val |= (s->B(13) << 6) & 0x2000; + val |= (s->B(14) << 7) & 0x4000; + val |= (s->B(15) << 8) & 0x8000; #endif return val; } > >> >> In cpu.h, the macro is defined on big endian host as >> #define XMM_B(n) _b[15 - (n)] >> >> But the type of Reg argument is MMXReg for pmovmskb_mmx and then the >> _b array has only 8 items. >> >> > > -- mailto:av1474@comtv.ru