From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1MvUfC-0004rm-Pq for qemu-devel@nongnu.org; Wed, 07 Oct 2009 07:26:34 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1MvUfB-0004qq-3t for qemu-devel@nongnu.org; Wed, 07 Oct 2009 07:26:34 -0400 Received: from [199.232.76.173] (port=40789 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1MvUfA-0004qg-RI for qemu-devel@nongnu.org; Wed, 07 Oct 2009 07:26:32 -0400 Received: from fe02x03-cgp.akado.ru ([77.232.31.165]:60369 helo=akado.ru) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1MvUfA-00016u-C5 for qemu-devel@nongnu.org; Wed, 07 Oct 2009 07:26:32 -0400 Date: Wed, 7 Oct 2009 15:26:29 +0400 (MSD) From: malc Subject: Re: [Qemu-devel] Help multi thread support. In-Reply-To: Message-ID: References: MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Nat Gurumoorthy Cc: qemu-devel@nongnu.org On Tue, 6 Oct 2009, Nat Gurumoorthy wrote: > Hi, > I am trying to add support for Ubicom 32 bit processors in QEMU. > These cpus have 10 - 12 hardware threads. The current versions have no > mmu. The threads do run independent of each other. How do I expose such > capabilities to QEMU. There is a flag "-cpu" which seems to allow > specification of multiple cores. Would I be using that? I still have to > figure out how to deal with cases where registers writes by one thread > affect the execution of another hardware thread. IP3K i'd guess? There are multiple challenges with Ubicom's CPUs, one being deterministic schedulling which might imply every TB being only one instruction big, anyways support for this beast is very interesting. -- mailto:av1474@comtv.ru