From: Stefan Hajnoczi <stefanha@redhat.com>
To: Alistair Francis <alistair.francis@opensource.wdc.com>
Cc: qemu-devel@nongnu.org, alistair23@gmail.com,
Alistair Francis <alistair.francis@wdc.com>
Subject: Re: [PULL 00/10] riscv-to-apply queue
Date: Sun, 16 Oct 2022 17:52:23 -0400 [thread overview]
Message-ID: <Y0x9F0oIr1IxgjYg@fedora> (raw)
In-Reply-To: <20221014075830.914722-1-alistair.francis@opensource.wdc.com>
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Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/7.2 for any user-visible changes.
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next prev parent reply other threads:[~2022-10-16 22:20 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-10-14 7:58 [PULL 00/10] riscv-to-apply queue Alistair Francis
2022-10-14 7:58 ` [PULL 01/10] hw/riscv: Update comment for qtest check in riscv_find_firmware() Alistair Francis
2022-10-14 7:58 ` [PULL 02/10] hw/ssi: ibex_spi: fixup coverity issue Alistair Francis
2022-10-14 7:58 ` [PULL 03/10] hw/ssi: ibex_spi: fixup/add rw1c functionality Alistair Francis
2022-10-14 7:58 ` [PULL 04/10] hw/arm, loongarch: Move load_image_to_fw_cfg() to common location Alistair Francis
2022-10-14 7:58 ` [PULL 05/10] hw/riscv: virt: Move create_fw_cfg() prior to loading kernel Alistair Francis
2022-10-14 7:58 ` [PULL 06/10] hw/riscv: virt: Enable booting S-mode firmware from pflash Alistair Francis
2022-10-14 7:58 ` [PULL 07/10] disas/riscv.c: rvv: Add disas support for vector instructions Alistair Francis
2022-10-14 7:58 ` [PULL 08/10] hw/intc: sifive_plic: fix hard-coded max priority level Alistair Francis
2022-10-14 7:58 ` [PULL 09/10] hw/intc: sifive_plic: change interrupt priority register to WARL field Alistair Francis
2022-10-14 7:58 ` [PULL 10/10] target/riscv: pmp: Fixup TLB size calculation Alistair Francis
2022-10-16 21:52 ` Stefan Hajnoczi [this message]
-- strict thread matches above, loose matches on Subject: below --
2025-03-19 8:02 [PULL 00/10] riscv-to-apply queue Alistair Francis
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