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Tue, 15 Nov 2022 06:38:40 -0500 (EST) Date: Tue, 15 Nov 2022 12:38:37 +0100 From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= To: Jan Beulich Cc: Stefano Stabellini , Anthony Perard , Paul Durrant , "open list:X86 Xen CPUs" , qemu-devel@nongnu.org Subject: Re: [PATCH 2/2] Do not access /dev/mem in MSI-X PCI passthrough on Xen Message-ID: References: <20221114192011.1539233-1-marmarek@invisiblethingslab.com> <20221114192011.1539233-2-marmarek@invisiblethingslab.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="fP+2vUV7w+NDnUJ4" Content-Disposition: inline In-Reply-To: Received-SPF: none client-ip=66.111.4.26; envelope-from=marmarek@invisiblethingslab.com; helo=out2-smtp.messagingengine.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_PASS=-0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org --fP+2vUV7w+NDnUJ4 Content-Type: text/plain; protected-headers=v1; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Date: Tue, 15 Nov 2022 12:38:37 +0100 From: Marek =?utf-8?Q?Marczykowski-G=C3=B3recki?= To: Jan Beulich Cc: Stefano Stabellini , Anthony Perard , Paul Durrant , "open list:X86 Xen CPUs" , qemu-devel@nongnu.org Subject: Re: [PATCH 2/2] Do not access /dev/mem in MSI-X PCI passthrough on Xen On Tue, Nov 15, 2022 at 09:14:07AM +0100, Jan Beulich wrote: > On 14.11.2022 20:20, Marek Marczykowski-G=C3=B3recki wrote: > > The /dev/mem is used for two purposes: > > - reading PCI_MSIX_ENTRY_CTRL_MASKBIT > > - reading Pending Bit Array (PBA) > >=20 > > The first one was originally done because when Xen did not send all > > vector ctrl writes to the device model, so QEMU might have outdated old > > register value. This has been changed in Xen, so QEMU can now use its > > cached value of the register instead. > >=20 > > The Pending Bit Array (PBA) handling is for the case where it lives on > > the same page as the MSI-X table itself. Xen has been extended to handle > > this case too (as well as other registers that may live on those pages), > > so QEMU handling is not necessary anymore. >=20 > Don't you need to check for new enough Xen for both aspects? Yes, see my response to Andrew in the thread. I'm open for suggestions what to check specifically (Xen version directly?).=20 --=20 Best Regards, Marek Marczykowski-G=C3=B3recki Invisible Things Lab --fP+2vUV7w+NDnUJ4 Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQEzBAEBCAAdFiEEhrpukzGPukRmQqkK24/THMrX1ywFAmNzej0ACgkQ24/THMrX 1ywIwQf/UFUun8P7OUjaX2Ec/IHmNYzkkRwq3iQjfLPLZBwaFQQptqOqE4wf6XLq YaBlINhTIW4WnYziauBQnANTna4e2guNyungBS+ELjXqziZJ0vY/yMtg0/Z0Ajy0 cGg9Rt6swEvK8GBqAo21juYlZcOgtq7LvisGWh2mRb6+xnT1m6Iiq9UurGomHIwk m8F5Q5dqV7gu3zS4C3AxaqHdttR1YcNmnpa5GrZYWt2MVpJ6LRChAKXRUXhlsqGP 180DHGlF5vVobPqMIOL9SBewp1X+kK0Qy9fN06hG+CAGvreZjBIVLMr7XmoGUQhG mZ1tumxTGC3+T/b4l3C814kUOSnA/w== =UW15 -----END PGP SIGNATURE----- --fP+2vUV7w+NDnUJ4--