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Thu, 11 Feb 2021 06:46:11 -0500 (EST) Date: Thu, 11 Feb 2021 12:46:09 +0100 From: Klaus Jensen To: Philippe =?utf-8?Q?Mathieu-Daud=C3=A9?= Subject: Re: [PULL 32/56] hw/block/nvme: split setup and register for namespace Message-ID: References: <20210209073101.548811-1-its@irrelevant.dk> <20210209073101.548811-33-its@irrelevant.dk> <20c3b649-b6c1-91ef-41cd-5c820a7f81cf@csgraf.de> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="3Bp6uz2DsDIrCMdf" Content-Disposition: inline In-Reply-To: Received-SPF: pass client-ip=66.111.4.230; envelope-from=its@irrelevant.dk; helo=new4-smtp.messagingengine.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Fam Zheng , Peter Maydell , Willian Rampazzo , qemu-block@nongnu.org, Klaus Jensen , qemu-devel@nongnu.org, Max Reitz , Alexander Graf , Minwoo Im , Stefan Hajnoczi , Keith Busch , Kevin Wolf Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" --3Bp6uz2DsDIrCMdf Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Feb 11 12:40, Philippe Mathieu-Daud=C3=A9 wrote: > On 2/11/21 10:53 AM, Alexander Graf wrote: > > Hi Klaus, > >=20 > > On 09.02.21 08:30, Klaus Jensen wrote: > >> From: Minwoo Im > >> > >> In NVMe, namespace is being attached to process I/O.=C2=A0 We register= NVMe > >> namespace to a controller via nvme_register_namespace() during > >> nvme_ns_setup().=C2=A0 This is main reason of receiving NvmeCtrl object > >> instance to this function to map the namespace to a controller. > >> > >> To make namespace instance more independent, it should be split into t= wo > >> parts: setup and register.=C2=A0 This patch split them into two differ= nt > >> parts, and finally nvme_ns_setup() does not have nothing to do with > >> NvmeCtrl instance at all. > >> > >> This patch is a former patch to introduce NVMe subsystem scheme to the > >> existing design especially for multi-path.=C2=A0 In that case, it shou= ld be > >> split into two to make namespace independent from a controller. > >> > >> Signed-off-by: Minwoo Im > >> Signed-off-by: Klaus Jensen > >=20 > >=20 > > In latest master, I can no longer access NVMe devices from edk2. Git > > bisect pointed me to this commit. > >=20 > > To reproduce: > >=20 > > =C2=A0 $ ./build/qemu-system-x86_64 -enable-kvm -pflash > > build/pc-bios/edk2-x86_64-code.fd -drive > > file=3Dimage.raw,if=3Dnone,id=3Dd,snapshot=3Don -device nvme,serial=3D1= 234,drive=3Dd > > -nographic -net none > >=20 > > You will see that before this commit, edk2 is able to enumerate the > > block device, while after this commit it does not find it. > >=20 > >=20 > > good: > >=20 > > Mapping table > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 FS0: Alias(s):HD1b:;BLK2: > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=EF=BF=BD > > PciRoot(0x0)/Pci(0x3,0x0)/NVMe(0x1,00-00-00-00-00-00-00-00)/HD(1,GPT,7A= 866FF6-0A12-4911-A4ED-D0565BEB41A2,0x80,0x64000) > >=20 > > =C2=A0=C2=A0=C2=A0=C2=A0 BLK0: Alias(s): > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 PciRoot(0x0)/Pci= (0x1,0x1)/Ata(0x0) > > =C2=A0=C2=A0=C2=A0=C2=A0 BLK1: Alias(s): > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=EF=BF=BD PciRoot(0x0)/= Pci(0x3,0x0)/NVMe(0x1,00-00-00-00-00-00-00-00) > > =C2=A0=C2=A0=C2=A0=C2=A0 BLK3: Alias(s): > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=EF=BF=BD > > PciRoot(0x0)/Pci(0x3,0x0)/NVMe(0x1,00-00-00-00-00-00-00-00)/HD(2,GPT,F0= 70566B-C58D-4F13-9B92-64F1794385E7,0x64080,0x40000) > >=20 > > =C2=A0=C2=A0=C2=A0=C2=A0 BLK4: Alias(s): > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=EF=BF=BD > > PciRoot(0x0)/Pci(0x3,0x0)/NVMe(0x1,00-00-00-00-00-00-00-00)/HD(3,GPT,ED= E86BE3-C64F-4ACB-B4AA-5E6C0135D335,0xA4080,0x315BF1B) >=20 > Good integration test for the emulated NVMe subsystem! >=20 > tests/acceptance/boot_linux_console.py should provide trivial template. >=20 Yes. This is something we really need. I will priorities this together with documentation :) Thanks for pointing me in the direction of this Philippe. --3Bp6uz2DsDIrCMdf Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQEzBAEBCAAdFiEEUigzqnXi3OaiR2bATeGvMW1PDekFAmAlGP8ACgkQTeGvMW1P Del7swgArH7KJos77eXenxIl+pKgztLujCQEySoYUDE79Hu0x/Oayf4MvFJi9baU TxDUKyRj/hsd4ybAaQ5wHOkJg9bLiPWCipOKf5t1guNCfBsFmITSjPtPVaHFnJMB i7C1NN5VtX97WUH86evjDYRAwYyye+RShFqoDGwGz9zj42E7uVxxvCYkEYKawNqG PztVBXqLFeuxtFqZd97ZpcKpZS4so1CboghylcZEaXJ+M2maFuVe7W3rlvWCEO17 rzimtk/JumT1NtMnu5aTAy1DYHS1t0c0RauVWbTgUuiZlzmgLBqMjB7w5ZjpF6iX sHqvMHhsN8g8xaT2PlYtk76VopoN8Q== =wEew -----END PGP SIGNATURE----- --3Bp6uz2DsDIrCMdf--