Re: [PATCH v5 07/10] target/ppc: Remove MSR_SA and MSR_AP from hflags

[David Gibson <david@gibson.dropbear.id.au>]

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On Tue, Mar 23, 2021 at 12:43:37PM -0600, Richard Henderson wrote:
> Nothing within the translator -- or anywhere else for that
> matter -- checks MSR_SA or MSR_AP on the 602.  This may be
> a mistake.  However, for the moment, we need not record these
> bits in hflags.

And frankly, even if it's wrong, I suspect the chances of someone
caring enough to fix 602 logic are pretty slim.

> This allows us to simplify HFLAGS_VSX computation by moving
> it to overlap with MSR_VSX.
> 
> Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

Applied to ppc-for-6.0.

> ---
>  target/ppc/cpu.h         |  4 +---
>  target/ppc/helper_regs.c | 10 ++++------
>  2 files changed, 5 insertions(+), 9 deletions(-)
> 
> diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
> index 3c28ddb331..2f72f83ee3 100644
> --- a/target/ppc/cpu.h
> +++ b/target/ppc/cpu.h
> @@ -600,14 +600,12 @@ enum {
>      HFLAGS_DR = 4,   /* MSR_DR */
>      HFLAGS_IR = 5,   /* MSR_IR */
>      HFLAGS_SPE = 6,  /* from MSR_SPE if cpu has SPE; avoid overlap w/ MSR_VR */
> -    HFLAGS_VSX = 7,  /* from MSR_VSX if cpu has VSX; avoid overlap w/ MSR_AP */
>      HFLAGS_TM = 8,   /* computed from MSR_TM */
>      HFLAGS_BE = 9,   /* MSR_BE -- from elsewhere on embedded ppc */
>      HFLAGS_SE = 10,  /* MSR_SE -- from elsewhere on embedded ppc */
>      HFLAGS_FP = 13,  /* MSR_FP */
>      HFLAGS_PR = 14,  /* MSR_PR */
> -    HFLAGS_SA = 22,  /* MSR_SA */
> -    HFLAGS_AP = 23,  /* MSR_AP */
> +    HFLAGS_VSX = 23, /* MSR_VSX if cpu has VSX */
>      HFLAGS_VR = 25,  /* MSR_VR if cpu has VRE */
>  };
>  
> diff --git a/target/ppc/helper_regs.c b/target/ppc/helper_regs.c
> index f85bb14d1d..dd3cd770a3 100644
> --- a/target/ppc/helper_regs.c
> +++ b/target/ppc/helper_regs.c
> @@ -99,11 +99,8 @@ void hreg_compute_hflags(CPUPPCState *env)
>      QEMU_BUILD_BUG_ON(MSR_DR != HFLAGS_DR);
>      QEMU_BUILD_BUG_ON(MSR_IR != HFLAGS_IR);
>      QEMU_BUILD_BUG_ON(MSR_FP != HFLAGS_FP);
> -    QEMU_BUILD_BUG_ON(MSR_SA != HFLAGS_SA);
> -    QEMU_BUILD_BUG_ON(MSR_AP != HFLAGS_AP);
>      msr_mask = ((1 << MSR_LE) | (1 << MSR_PR) |
> -                (1 << MSR_DR) | (1 << MSR_IR) |
> -                (1 << MSR_FP) | (1 << MSR_SA) | (1 << MSR_AP));
> +                (1 << MSR_DR) | (1 << MSR_IR) | (1 << MSR_FP));
>  
>      if (ppc_flags & POWERPC_FLAG_HID0_LE) {
>          /*
> @@ -143,8 +140,9 @@ void hreg_compute_hflags(CPUPPCState *env)
>          QEMU_BUILD_BUG_ON(MSR_VR != HFLAGS_VR);
>          msr_mask |= 1 << MSR_VR;
>      }
> -    if ((ppc_flags & POWERPC_FLAG_VSX) && (msr & (1 << MSR_VSX))) {
> -        hflags |= 1 << HFLAGS_VSX;
> +    if (ppc_flags & POWERPC_FLAG_VSX) {
> +        QEMU_BUILD_BUG_ON(MSR_VSX != HFLAGS_VSX);
> +        msr_mask |= 1 << MSR_VSX;
>      }
>      if ((ppc_flags & POWERPC_FLAG_TM) && (msr & (1ull << MSR_TM))) {
>          hflags |= 1 << HFLAGS_TM;

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

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