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From: David Gibson <david@gibson.dropbear.id.au>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org
Subject: Re: [PATCH v5 09/10] linux-user/ppc: Fix msr updates for signal handling
Date: Wed, 24 Mar 2021 11:10:55 +1100	[thread overview]
Message-ID: <YFqDj93aQoiNQM8e@yekko.fritz.box> (raw)
In-Reply-To: <20210323184340.619757-10-richard.henderson@linaro.org>

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On Tue, Mar 23, 2021 at 12:43:39PM -0600, Richard Henderson wrote:
> In save_user_regs, there are two bugs where we OR in a bit number
> instead of the bit, clobbering the low bits of MSR.  However:
> 
> The MSR_VR and MSR_SPE bits control the availability of the insns.
> If the bits were not already set in MSR, then any attempt to access
> those registers would result in SIGILL.
> 
> For linux-user, we always initialize MSR to the capabilities
> of the cpu.  We *could* add checks vs MSR where we currently
> check insn_flags and insn_flags2, but we know they match.
> 
> Also, there's a stray cut-and-paste comment in restore.
> 
> Then, do not force little-endian binaries into big-endian mode.
> 
> Finally, use ppc_store_msr for the update to affect hflags.
> Which is the reason none of these bugs were previously noticed.
> 
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

Applied to ppc-for-6.0.

> ---
>  linux-user/ppc/cpu_loop.c |  5 +++--
>  linux-user/ppc/signal.c   | 23 +++++++++++------------
>  2 files changed, 14 insertions(+), 14 deletions(-)
> 
> diff --git a/linux-user/ppc/cpu_loop.c b/linux-user/ppc/cpu_loop.c
> index df71e15a25..4a0f6c8dc2 100644
> --- a/linux-user/ppc/cpu_loop.c
> +++ b/linux-user/ppc/cpu_loop.c
> @@ -492,11 +492,12 @@ void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs)
>  #if defined(TARGET_PPC64)
>      int flag = (env->insns_flags2 & PPC2_BOOKE206) ? MSR_CM : MSR_SF;
>  #if defined(TARGET_ABI32)
> -    env->msr &= ~((target_ulong)1 << flag);
> +    ppc_store_msr(env, env->msr & ~((target_ulong)1 << flag));
>  #else
> -    env->msr |= (target_ulong)1 << flag;
> +    ppc_store_msr(env, env->msr | (target_ulong)1 << flag);
>  #endif
>  #endif
> +
>      env->nip = regs->nip;
>      for(i = 0; i < 32; i++) {
>          env->gpr[i] = regs->gpr[i];
> diff --git a/linux-user/ppc/signal.c b/linux-user/ppc/signal.c
> index b78613f7c8..bad38f8ed9 100644
> --- a/linux-user/ppc/signal.c
> +++ b/linux-user/ppc/signal.c
> @@ -261,9 +261,6 @@ static void save_user_regs(CPUPPCState *env, struct target_mcontext *frame)
>              __put_user(avr->u64[PPC_VEC_HI], &vreg->u64[0]);
>              __put_user(avr->u64[PPC_VEC_LO], &vreg->u64[1]);
>          }
> -        /* Set MSR_VR in the saved MSR value to indicate that
> -           frame->mc_vregs contains valid data.  */
> -        msr |= MSR_VR;
>  #if defined(TARGET_PPC64)
>          vrsave = (uint32_t *)&frame->mc_vregs.altivec[33];
>          /* 64-bit needs to put a pointer to the vectors in the frame */
> @@ -300,9 +297,6 @@ static void save_user_regs(CPUPPCState *env, struct target_mcontext *frame)
>          for (i = 0; i < ARRAY_SIZE(env->gprh); i++) {
>              __put_user(env->gprh[i], &frame->mc_vregs.spe[i]);
>          }
> -        /* Set MSR_SPE in the saved MSR value to indicate that
> -           frame->mc_vregs contains valid data.  */
> -        msr |= MSR_SPE;
>          __put_user(env->spe_fscr, &frame->mc_vregs.spe[32]);
>      }
>  #endif
> @@ -354,8 +348,10 @@ static void restore_user_regs(CPUPPCState *env,
>      __get_user(msr, &frame->mc_gregs[TARGET_PT_MSR]);
>  
>      /* If doing signal return, restore the previous little-endian mode.  */
> -    if (sig)
> -        env->msr = (env->msr & ~(1ull << MSR_LE)) | (msr & (1ull << MSR_LE));
> +    if (sig) {
> +        ppc_store_msr(env, ((env->msr & ~(1ull << MSR_LE)) |
> +                            (msr & (1ull << MSR_LE))));
> +    }
>  
>      /* Restore Altivec registers if necessary.  */
>      if (env->insns_flags & PPC_ALTIVEC) {
> @@ -376,8 +372,6 @@ static void restore_user_regs(CPUPPCState *env,
>              __get_user(avr->u64[PPC_VEC_HI], &vreg->u64[0]);
>              __get_user(avr->u64[PPC_VEC_LO], &vreg->u64[1]);
>          }
> -        /* Set MSR_VEC in the saved MSR value to indicate that
> -           frame->mc_vregs contains valid data.  */
>  #if defined(TARGET_PPC64)
>          vrsave = (uint32_t *)&v_regs[33];
>  #else
> @@ -468,7 +462,7 @@ void setup_frame(int sig, struct target_sigaction *ka,
>      env->nip = (target_ulong) ka->_sa_handler;
>  
>      /* Signal handlers are entered in big-endian mode.  */
> -    env->msr &= ~(1ull << MSR_LE);
> +    ppc_store_msr(env, env->msr & ~(1ull << MSR_LE));
>  
>      unlock_user_struct(frame, frame_addr, 1);
>      return;
> @@ -563,8 +557,13 @@ void setup_rt_frame(int sig, struct target_sigaction *ka,
>      env->nip = (target_ulong) ka->_sa_handler;
>  #endif
>  
> +#ifdef TARGET_WORDS_BIGENDIAN
>      /* Signal handlers are entered in big-endian mode.  */
> -    env->msr &= ~(1ull << MSR_LE);
> +    ppc_store_msr(env, env->msr & ~(1ull << MSR_LE));
> +#else
> +    /* Signal handlers are entered in little-endian mode.  */
> +    ppc_store_msr(env, env->msr | (1ull << MSR_LE));
> +#endif
>  
>      unlock_user_struct(rt_sf, rt_sf_addr, 1);
>      return;

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

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  reply	other threads:[~2021-03-24  1:39 UTC|newest]

Thread overview: 35+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-23 18:43 [PATCH v5 00/10] target/ppc: Fix truncation of env->hflags Richard Henderson
2021-03-23 18:43 ` [PATCH v5 01/10] target/ppc: Extract post_load_update_msr Richard Henderson
2021-03-24  0:00   ` David Gibson
2021-03-23 18:43 ` [PATCH v5 02/10] target/ppc: Disconnect hflags from MSR Richard Henderson
2021-03-24  0:03   ` David Gibson
2021-03-29 13:05     ` Greg Kurz
2021-03-29 16:26       ` Richard Henderson
2021-03-30  4:54         ` David Gibson
2021-03-30 15:01           ` Richard Henderson
2021-03-31  0:09             ` David Gibson
2021-03-31  4:04               ` Greg Kurz
2021-03-31  4:47                 ` David Gibson
2021-03-31  6:31                   ` Richard Henderson
2021-04-01  3:17                     ` David Gibson
2021-03-31  7:30                   ` Greg Kurz
2021-03-23 18:43 ` [PATCH v5 03/10] target/ppc: Reduce env->hflags to uint32_t Richard Henderson
2021-03-24  0:03   ` David Gibson
2021-03-23 18:43 ` [PATCH v5 04/10] target/ppc: Put dbcr0 single-step bits into hflags Richard Henderson
2021-03-24  0:04   ` David Gibson
2021-03-23 18:43 ` [PATCH v5 05/10] target/ppc: Create helper_scv Richard Henderson
2021-03-24  0:05   ` David Gibson
2021-03-23 18:43 ` [PATCH v5 06/10] target/ppc: Put LPCR[GTSE] in hflags Richard Henderson
2021-03-24  0:06   ` David Gibson
2021-03-23 18:43 ` [PATCH v5 07/10] target/ppc: Remove MSR_SA and MSR_AP from hflags Richard Henderson
2021-03-24  0:08   ` David Gibson
2021-03-23 18:43 ` [PATCH v5 08/10] target/ppc: Remove env->immu_idx and env->dmmu_idx Richard Henderson
2021-03-24  0:09   ` David Gibson
2021-03-23 18:43 ` [PATCH v5 09/10] linux-user/ppc: Fix msr updates for signal handling Richard Henderson
2021-03-24  0:10   ` David Gibson [this message]
2021-03-23 18:43 ` [PATCH v5 10/10] target/ppc: Validate hflags with CONFIG_DEBUG_TCG Richard Henderson
2021-03-24  0:12   ` David Gibson
2021-03-25  8:47     ` David Gibson
2021-03-26 12:41       ` Richard Henderson
2021-03-27 12:46         ` Richard Henderson
2021-03-28 13:09           ` David Gibson

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