From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 26CB7C433C1 for ; Wed, 24 Mar 2021 01:39:15 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C03B4619E8 for ; Wed, 24 Mar 2021 01:39:14 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org C03B4619E8 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=gibson.dropbear.id.au Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:36932 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lOsUL-0000hJ-Jw for qemu-devel@archiver.kernel.org; Tue, 23 Mar 2021 21:39:13 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:36848) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lOsPw-0004Q1-Hi; Tue, 23 Mar 2021 21:34:40 -0400 Received: from ozlabs.org ([203.11.71.1]:33261) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lOsPu-0001m7-C9; Tue, 23 Mar 2021 21:34:40 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 4F4rPc6hfcz9sXG; Wed, 24 Mar 2021 12:34:28 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1616549668; bh=nefogDx3IlmEHchmOdDZpUHs/iWCXMaNkRazHjwj5mc=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=kYTt38hNO0vX1Wh0i0igX9h6MemIBBcwvlbAlUZf/bpd8qFIRb3xqUX2KGF8hLsdO wEjaKBM9UeQX6QjcRwXVv2uxDpf9gMojgyA/Tkm6Q/u8A/rOzDj43aJ/aSNEgNhNan ExlsF7qAnSmEjnVOst+nHhAz8aJJDipNvGjyhENU= Date: Wed, 24 Mar 2021 11:10:55 +1100 From: David Gibson To: Richard Henderson Subject: Re: [PATCH v5 09/10] linux-user/ppc: Fix msr updates for signal handling Message-ID: References: <20210323184340.619757-1-richard.henderson@linaro.org> <20210323184340.619757-10-richard.henderson@linaro.org> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="z5UUcRyDpgv10YAW" Content-Disposition: inline In-Reply-To: <20210323184340.619757-10-richard.henderson@linaro.org> Received-SPF: pass client-ip=203.11.71.1; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.249, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" --z5UUcRyDpgv10YAW Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Tue, Mar 23, 2021 at 12:43:39PM -0600, Richard Henderson wrote: > In save_user_regs, there are two bugs where we OR in a bit number > instead of the bit, clobbering the low bits of MSR. However: >=20 > The MSR_VR and MSR_SPE bits control the availability of the insns. > If the bits were not already set in MSR, then any attempt to access > those registers would result in SIGILL. >=20 > For linux-user, we always initialize MSR to the capabilities > of the cpu. We *could* add checks vs MSR where we currently > check insn_flags and insn_flags2, but we know they match. >=20 > Also, there's a stray cut-and-paste comment in restore. >=20 > Then, do not force little-endian binaries into big-endian mode. >=20 > Finally, use ppc_store_msr for the update to affect hflags. > Which is the reason none of these bugs were previously noticed. >=20 > Signed-off-by: Richard Henderson Applied to ppc-for-6.0. > --- > linux-user/ppc/cpu_loop.c | 5 +++-- > linux-user/ppc/signal.c | 23 +++++++++++------------ > 2 files changed, 14 insertions(+), 14 deletions(-) >=20 > diff --git a/linux-user/ppc/cpu_loop.c b/linux-user/ppc/cpu_loop.c > index df71e15a25..4a0f6c8dc2 100644 > --- a/linux-user/ppc/cpu_loop.c > +++ b/linux-user/ppc/cpu_loop.c > @@ -492,11 +492,12 @@ void target_cpu_copy_regs(CPUArchState *env, struct= target_pt_regs *regs) > #if defined(TARGET_PPC64) > int flag =3D (env->insns_flags2 & PPC2_BOOKE206) ? MSR_CM : MSR_SF; > #if defined(TARGET_ABI32) > - env->msr &=3D ~((target_ulong)1 << flag); > + ppc_store_msr(env, env->msr & ~((target_ulong)1 << flag)); > #else > - env->msr |=3D (target_ulong)1 << flag; > + ppc_store_msr(env, env->msr | (target_ulong)1 << flag); > #endif > #endif > + > env->nip =3D regs->nip; > for(i =3D 0; i < 32; i++) { > env->gpr[i] =3D regs->gpr[i]; > diff --git a/linux-user/ppc/signal.c b/linux-user/ppc/signal.c > index b78613f7c8..bad38f8ed9 100644 > --- a/linux-user/ppc/signal.c > +++ b/linux-user/ppc/signal.c > @@ -261,9 +261,6 @@ static void save_user_regs(CPUPPCState *env, struct t= arget_mcontext *frame) > __put_user(avr->u64[PPC_VEC_HI], &vreg->u64[0]); > __put_user(avr->u64[PPC_VEC_LO], &vreg->u64[1]); > } > - /* Set MSR_VR in the saved MSR value to indicate that > - frame->mc_vregs contains valid data. */ > - msr |=3D MSR_VR; > #if defined(TARGET_PPC64) > vrsave =3D (uint32_t *)&frame->mc_vregs.altivec[33]; > /* 64-bit needs to put a pointer to the vectors in the frame */ > @@ -300,9 +297,6 @@ static void save_user_regs(CPUPPCState *env, struct t= arget_mcontext *frame) > for (i =3D 0; i < ARRAY_SIZE(env->gprh); i++) { > __put_user(env->gprh[i], &frame->mc_vregs.spe[i]); > } > - /* Set MSR_SPE in the saved MSR value to indicate that > - frame->mc_vregs contains valid data. */ > - msr |=3D MSR_SPE; > __put_user(env->spe_fscr, &frame->mc_vregs.spe[32]); > } > #endif > @@ -354,8 +348,10 @@ static void restore_user_regs(CPUPPCState *env, > __get_user(msr, &frame->mc_gregs[TARGET_PT_MSR]); > =20 > /* If doing signal return, restore the previous little-endian mode. = */ > - if (sig) > - env->msr =3D (env->msr & ~(1ull << MSR_LE)) | (msr & (1ull << MS= R_LE)); > + if (sig) { > + ppc_store_msr(env, ((env->msr & ~(1ull << MSR_LE)) | > + (msr & (1ull << MSR_LE)))); > + } > =20 > /* Restore Altivec registers if necessary. */ > if (env->insns_flags & PPC_ALTIVEC) { > @@ -376,8 +372,6 @@ static void restore_user_regs(CPUPPCState *env, > __get_user(avr->u64[PPC_VEC_HI], &vreg->u64[0]); > __get_user(avr->u64[PPC_VEC_LO], &vreg->u64[1]); > } > - /* Set MSR_VEC in the saved MSR value to indicate that > - frame->mc_vregs contains valid data. */ > #if defined(TARGET_PPC64) > vrsave =3D (uint32_t *)&v_regs[33]; > #else > @@ -468,7 +462,7 @@ void setup_frame(int sig, struct target_sigaction *ka, > env->nip =3D (target_ulong) ka->_sa_handler; > =20 > /* Signal handlers are entered in big-endian mode. */ > - env->msr &=3D ~(1ull << MSR_LE); > + ppc_store_msr(env, env->msr & ~(1ull << MSR_LE)); > =20 > unlock_user_struct(frame, frame_addr, 1); > return; > @@ -563,8 +557,13 @@ void setup_rt_frame(int sig, struct target_sigaction= *ka, > env->nip =3D (target_ulong) ka->_sa_handler; > #endif > =20 > +#ifdef TARGET_WORDS_BIGENDIAN > /* Signal handlers are entered in big-endian mode. */ > - env->msr &=3D ~(1ull << MSR_LE); > + ppc_store_msr(env, env->msr & ~(1ull << MSR_LE)); > +#else > + /* Signal handlers are entered in little-endian mode. */ > + ppc_store_msr(env, env->msr | (1ull << MSR_LE)); > +#endif > =20 > unlock_user_struct(rt_sf, rt_sf_addr, 1); > return; --=20 David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. 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