From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.6 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7F52DC433ED for ; Thu, 22 Apr 2021 02:18:12 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id AD78A61450 for ; Thu, 22 Apr 2021 02:18:11 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org AD78A61450 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=gibson.dropbear.id.au Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:52008 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lZOuw-0005ey-LZ for qemu-devel@archiver.kernel.org; Wed, 21 Apr 2021 22:18:10 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:35854) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lZOtW-0004iL-3z; Wed, 21 Apr 2021 22:16:42 -0400 Received: from ozlabs.org ([203.11.71.1]:35469) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lZOtT-0003ku-HM; Wed, 21 Apr 2021 22:16:41 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 4FQgyn4qmNz9sWH; Thu, 22 Apr 2021 12:16:33 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1619057793; bh=pjSD6fcv7y2AmKG8yk1op9b+9G3r+6kNIDFjYZVL5Rg=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=nS3tbAP5+NiJ89vIjYU2uKmJ40TGt6jSSKqa5m8Vc7KDsQWi6SwhdeviK6muaqJcg nntvUxj7qQxQpga27gptdgmPdwJi18zwgKNmqzAEJZhnFKrYEF1UQsR6lRlRqNJ572 aBPNN+BYxaUD28Hrffi2grDso0TSKuNEYqosKnIM= Date: Thu, 22 Apr 2021 11:56:54 +1000 From: David Gibson To: Ravi Bangoria Subject: Re: [PATCH v5 3/3] ppc: Enable 2nd DAWR support on p10 Message-ID: References: <20210412114433.129702-1-ravi.bangoria@linux.ibm.com> <20210412114433.129702-4-ravi.bangoria@linux.ibm.com> <8020c404-d8ce-2758-d936-fc5e851017f0@kaod.org> <0b6e1a4a-eed2-1a45-50bf-2ccab398f4ed@linux.ibm.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="3/7Eip2jHCSaf7Bo" Content-Disposition: inline In-Reply-To: <0b6e1a4a-eed2-1a45-50bf-2ccab398f4ed@linux.ibm.com> Received-SPF: pass client-ip=203.11.71.1; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.249, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, mikey@neuling.org, kvm@vger.kernel.org, mst@redhat.com, mpe@ellerman.id.au, cohuck@redhat.com, qemu-devel@nongnu.org, groug@kaod.org, paulus@samba.org, =?iso-8859-1?Q?C=E9dric?= Le Goater , pbonzini@redhat.com Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" --3/7Eip2jHCSaf7Bo Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Apr 21, 2021 at 12:24:22PM +0530, Ravi Bangoria wrote: > Hi Cedric, >=20 > On 4/21/21 12:01 PM, C=E9dric Le Goater wrote: > > On 4/21/21 8:20 AM, Ravi Bangoria wrote: > > > Hi David, > > >=20 > > > On 4/19/21 10:23 AM, David Gibson wrote: > > > > On Mon, Apr 12, 2021 at 05:14:33PM +0530, Ravi Bangoria wrote: > > > > > As per the PAPR, bit 0 of byte 64 in pa-features property indicat= es > > > > > availability of 2nd DAWR registers. i.e. If this bit is set, 2nd > > > > > DAWR is present, otherwise not. Use KVM_CAP_PPC_DAWR1 capability = to > > > > > find whether kvm supports 2nd DAWR or not. If it's supported, all= ow > > > > > user to set the pa-feature bit in guest DT using cap-dawr1 machine > > > > > capability. Though, watchpoint on powerpc TCG guest is not suppor= ted > > > > > and thus 2nd DAWR is not enabled for TCG mode. > > > > >=20 > > > > > Signed-off-by: Ravi Bangoria > > > > > Reviewed-by: Greg Kurz > > > >=20 > > > > So, I'm actually not sure if using an spapr capability is what we w= ant > > > > to do here.=A0 The problem is that presumably the idea is to at some > > > > point make the DAWR1 capability default to on (on POWER10, at least= ). > > > > But at that point you'll no longer to be able to start TCG guests > > > > without explicitly disabling it.=A0 That's technically correct, sin= ce we > > > > don't implement DAWR1 in TCG, but then we also don't implement DAWR0 > > > > and we let that slide... which I think is probably going to cause l= ess > > > > irritation on balance. > > >=20 > > > Ok. Probably something like this is what you want? > > >=20 > > > Power10 behavior: > > > =A0 - KVM does not support DAWR1: Boot the guest without DAWR1 > > > =A0=A0=A0 support (No warnings). Error out only if user tries with > > > =A0=A0=A0 cap-dawr1=3Don. > > > =A0 - KVM supports DAWR1: Boot the guest with DAWR1 support, unless > > > =A0=A0=A0 user specifies cap-dawr1=3Doff. > > > =A0 - TCG guest: Ignore cap-dawr1 i.e. boot as if there is only > > > =A0=A0=A0 DAWR0 (Should be fixed in future while adding PowerPC watc= h- > > > =A0=A0=A0 point support in TCG mode) > > >=20 > > > Power10 predecessor behavior: > > > =A0 - KVM guest: Boot the guest without DAWR1 support. Error out > > > =A0=A0=A0 if user tries with cap-dawr1=3Don. > > > =A0 - TCG guest: Ignore cap-dawr1 i.e. boot as if there is only > > > =A0=A0=A0 DAWR0 (Should be fixed in future while adding PowerPC watc= h- > > > =A0=A0=A0 point support in TCG mode) > > >=20 > > > > I'm wondering if we're actually just better off setting the pa feat= ure > > > > just based on the guest CPU model.=A0 TCG will be broken if you try= to > > > > use it, but then, it already is.=A0 AFAIK there's no inherent reaso= n we > > > > couldn't implement DAWR support in TCG, it's just never been worth = the > > > > trouble. > > >=20 > > > Correct. Probably there is no practical usecase for DAWR in TCG mode. > >=20 > > What's the expected behavior ? Is it to generate a DSI if we have a DAWR > > match ? >=20 > Yes. DSI is the main thing. But many auxiliary stuff, off the top of my > head: > - DAR needs to be set. Now, DAR value is set differently on p8 vs p10 > (not sure about p9 because there was hw bug and thus we needed to > fully disable DAWR on p9). > - DAWR matching criteria for quadword instruction are different for > p8/p9 vs p10. > - P10 supports 512 byte unaligned watchpoints but p8/p9 does not. >=20 > Kernel is aware of these differences and thus handles these scenarios, > sometimes as special case. i.e. Qemu will need to mimic the exact hw > behavior for the specific revision of processor. I don't actually know if qemu has TCG watchpoint support on any hardware. Presumably it would mean instrumenting all the tcg loads and stores. --=20 David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. 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