From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-3.5 required=3.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_HELO_NONE, SPF_PASS,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 31DF2C433B4 for ; Tue, 27 Apr 2021 01:58:11 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9981061027 for ; Tue, 27 Apr 2021 01:58:10 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9981061027 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=gibson.dropbear.id.au Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Received: from localhost ([::1]:39770 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lbCzH-0005aY-Vz for qemu-devel@archiver.kernel.org; Mon, 26 Apr 2021 21:58:08 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:59854) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lbCy5-0003pW-1k; Mon, 26 Apr 2021 21:56:53 -0400 Received: from ozlabs.org ([203.11.71.1]:35319) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lbCy1-0000hj-BS; Mon, 26 Apr 2021 21:56:52 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 4FTlHV4KqXz9sXG; Tue, 27 Apr 2021 11:56:38 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1619488598; bh=3GPsU4l4QdzotKVn6XCmCEvww3A8V7FWO4ADgeDJz24=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=KC96LlPbdMl25oVPUA2Gr0omODOX45Bt4I8yARnER2Ge2J5ZxGoKC3p8leNY7HEOQ gJmosOGwwYtlw6DABct+kygwMQ3EPvv6T/qMcULuRXJzpHbst+whUt3MI9gnFzA5XH CaZ33XCO8WoWKUXcfCoKeKF4nWAfZFwG5yZahK2M= Date: Tue, 27 Apr 2021 11:29:24 +1000 From: David Gibson To: Fabiano Rosas Subject: Re: [PATCH 1/4] target/ppc: Code motion required to build disabling tcg Message-ID: References: <87mttq15a1.fsf@linux.ibm.com> <874kfxf7v5.fsf@linux.ibm.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="CF687K1U+U4j0WQH" Content-Disposition: inline In-Reply-To: <874kfxf7v5.fsf@linux.ibm.com> Received-SPF: pass client-ip=203.11.71.1; envelope-from=dgibson@ozlabs.org; helo=ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.249, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , "qemu-devel@nongnu.org" , Andre Fernando da Silva , Lucas Mateus Martins Araujo e Castro , Fernando Eckhardt Valle , "qemu-ppc@nongnu.org" , "lagarcia@br.ibm.com" , Bruno Piazera Larsen , Matheus Kowalczuk Ferst , Luis Fernando Fujita Pires Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" --CF687K1U+U4j0WQH Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Fri, Apr 23, 2021 at 10:28:14AM -0300, Fabiano Rosas wrote: > David Gibson writes: >=20 > > On Thu, Apr 22, 2021 at 04:35:34PM -0300, Fabiano Rosas wrote: > >> Bruno Piazera Larsen writes: > >>=20 > >> >> > You are correct! I've just tweaked the code that defines spr_regi= ster and > >> >> > it should be working now. I'm still working in splitting the SPR = functions > >> >> > from translate_init, since I think it would make it easier to pre= pare the > >> >> > !TCG case and for adding new architectures in the future, and I f= ound a > >> >> > few more problems: > >> >> > >> >> Actually looking at the stuff below, I suspect that separating our > >> >> "spr" logic specifically might be a bad idea. At least some of the > >> >> SPRs control pretty fundamental things about how the processor > >> >> operates, and I suspect separating it from the main translation log= ic > >> >> may be more trouble than it's worth. > >>=20 > >> I disagree with the code proximity argument. Having TCG code clearly > >> separate from common code seems more important to me than having the S= PR > >> callbacks close to the init_proc functions. > > > > Hmm.. I may be misinterpreting what you're intending here. I > > certainly agree that separating TCG only code from common code is a > > good idea. My point, though, is that the vast majority of the SPR > > code *is* TCG specific - there are just a relatively few cases where > > SPRs have a common path. That basically only happens when a) the SPR > > can be affected by means other than the guest executing instructions > > specifically to do that (i.e. usually by hypercalls) and b) accessing > > the SPR has some side effects that need to be handled in both TCG and > > KVM cases >=20 > The SPR code in translate_init.c.inc currently comprises of: >=20 > 1) the gen_spr* functions that are called during init_proc for each > processor type; Ah... that's one part of the confusion. I forgot about these functions. These should indeed be common, despite sharing the gen_*() prefix with mostly things that are explicitly TCG only. > 2) the spr_register macros and _spr_register function that adds the SPRs > to env->spr, called from (1); >=20 > 3) the TCG-specific SPR read|write callbacks, registered by (2); >=20 > 4) the KVM specific attribute one_reg_id, registered by (2). >=20 > The intention is to have one .c file (cpu_init.c) that deals with > processor initialization, which is mostly setting PowerPCCPUClass > attributes and registering the appropriate SPRs for each processor > family (1,2). We're considering that to be shared between KVM and TCG > for now. Yes, that's what I'd expect. > What is going into a separate file are the read and write SPR callbacks, > which are TCG specific (3). They are still referenced from the other > file when registering the SPRs, but are ignored when building for > KVM-only. These are kept in a TCG-only compilation unit. Ah, right, I'd forgotten that many of the callbacks are in translate_init.c not translate.c. Indeed, those will have to move. > There's still a > decision to be made whether we should have a separate spr_tcg file for > them, or move them into translate.c along with the rest of TCG code. Ah, I see. Ok, yes, in that case moving them to a new TCG only spr file makes more sense to me. translate.c is already enormous. >=20 > The one_reg_id is just one attribute so that does not change. >=20 > > From the descriptions it sounded like you were trying to separate > > *all* SPR code, not just these specific cases from the translation > > core, and that's what I'm saying is a bad idea. >=20 > So, if anything, the SPR callbacks are moving _closer_ to the > translation core. Right. Sorry for the misunderstanding. --=20 David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. 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