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From: David Gibson <david@gibson.dropbear.id.au>
To: "Bruno Larsen (billionai)" <bruno.larsen@eldorado.org.br>
Cc: farosas@linux.ibm.com, richard.henderson@linaro.org,
	qemu-devel@nongnu.org, lucas.araujo@eldorado.org.br,
	fernando.valle@eldorado.org.br, qemu-ppc@nongnu.org,
	matheus.ferst@eldorado.org.br, luis.pires@eldorado.org.br
Subject: Re: [PATCH v5 4/4] target/ppc: isolated cpu init from translation logic
Date: Fri, 7 May 2021 13:00:33 +1000	[thread overview]
Message-ID: <YJStUWAUq5g7AcMp@yekko> (raw)
In-Reply-To: <20210505155310.62710-5-bruno.larsen@eldorado.org.br>

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On Wed, May 05, 2021 at 12:53:10PM -0300, Bruno Larsen (billionai) wrote:
> finished isolation of CPU initialization logic from
> translation logic. CPU initialization now only has common code
> and may or may not call accelerator-specific code, as the
> build options require.
> 
> Signed-off-by: Bruno Larsen (billionai)
> <bruno.larsen@eldorado.org.br>

Reviewed-by: David Gibson <david@gibson.dropbear.id.au>

> ---
>  target/ppc/{translate_init.c.inc => cpu_init.c} | 6 ++++++
>  target/ppc/meson.build                          | 1 +
>  target/ppc/spr_tcg.h                            | 2 ++
>  target/ppc/translate.c                          | 4 ++--
>  4 files changed, 11 insertions(+), 2 deletions(-)
>  rename target/ppc/{translate_init.c.inc => cpu_init.c} (99%)
> 
> diff --git a/target/ppc/translate_init.c.inc b/target/ppc/cpu_init.c
> similarity index 99%
> rename from target/ppc/translate_init.c.inc
> rename to target/ppc/cpu_init.c
> index 2f4e463bb6..faece1dca2 100644
> --- a/target/ppc/translate_init.c.inc
> +++ b/target/ppc/cpu_init.c
> @@ -18,6 +18,7 @@
>   * License along with this library; if not, see <http://www.gnu.org/licenses/>.
>   */
>  
> +#include "qemu/osdep.h"
>  #include "disas/dis-asm.h"
>  #include "exec/gdbstub.h"
>  #include "kvm_ppc.h"
> @@ -42,6 +43,11 @@
>  #include "fpu/softfloat.h"
>  #include "qapi/qapi-commands-machine-target.h"
>  
> +#include "exec/helper-proto.h"
> +#include "helper_regs.h"
> +#include "internal.h"
> +#include "spr_tcg.h"
> +
>  /* #define PPC_DEBUG_SPR */
>  /* #define USE_APPLE_GDB */
>  
> diff --git a/target/ppc/meson.build b/target/ppc/meson.build
> index 4079d01ee3..d1aa7d5d39 100644
> --- a/target/ppc/meson.build
> +++ b/target/ppc/meson.build
> @@ -2,6 +2,7 @@ ppc_ss = ss.source_set()
>  ppc_ss.add(files(
>    'cpu-models.c',
>    'cpu.c',
> +  'cpu_init.c',
>    'dfp_helper.c',
>    'excp_helper.c',
>    'fpu_helper.c',
> diff --git a/target/ppc/spr_tcg.h b/target/ppc/spr_tcg.h
> index 1d2890dea0..0be5f347d5 100644
> --- a/target/ppc/spr_tcg.h
> +++ b/target/ppc/spr_tcg.h
> @@ -19,6 +19,8 @@
>  #ifndef SPR_TCG_H
>  #define SPR_TCG_H
>  
> +#define SPR_NOACCESS (&spr_noaccess)
> +
>  /* prototypes for readers and writers for SPRs */
>  void spr_noaccess(DisasContext *ctx, int gprn, int sprn);
>  void spr_read_generic(DisasContext *ctx, int gprn, int sprn);
> diff --git a/target/ppc/translate.c b/target/ppc/translate.c
> index 8feececba0..cc209e5999 100644
> --- a/target/ppc/translate.c
> +++ b/target/ppc/translate.c
> @@ -38,6 +38,8 @@
>  #include "qemu/atomic128.h"
>  #include "spr_tcg.h"
>  
> +#include "qemu/qemu-print.h"
> +#include "qapi/error.h"
>  
>  #define CPU_SINGLE_STEP 0x1
>  #define CPU_BRANCH_STEP 0x2
> @@ -380,7 +382,6 @@ void spr_noaccess(DisasContext *ctx, int gprn, int sprn)
>      printf("ERROR: try to access SPR %d !\n", sprn);
>  #endif
>  }
> -#define SPR_NOACCESS (&spr_noaccess)
>  
>  /* #define PPC_DUMP_SPR_ACCESSES */
>  
> @@ -8617,7 +8618,6 @@ GEN_HANDLER2_E(trechkpt, "trechkpt", 0x1F, 0x0E, 0x1F, 0x03FFF800, \
>  };
>  
>  #include "helper_regs.h"
> -#include "translate_init.c.inc"
>  
>  /*****************************************************************************/
>  /* Misc PowerPC helpers */

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

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      reply	other threads:[~2021-05-07  3:03 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-05 15:53 [PATCH v5 0/4] target/ppc: Untangle CPU init from translation Bruno Larsen (billionai)
2021-05-05 15:53 ` [PATCH v5 1/4] target/ppc: renamed SPR registration functions Bruno Larsen (billionai)
2021-05-06  5:51   ` David Gibson
2021-05-05 15:53 ` [PATCH v5 2/4] target/ppc: move SPR R/W callbacks to translate.c Bruno Larsen (billionai)
2021-05-06 18:57   ` Richard Henderson
2021-05-06 19:06     ` Bruno Piazera Larsen
2021-05-05 15:53 ` [PATCH v5 3/4] target/ppc: turned SPR R/W callbacks not static Bruno Larsen (billionai)
2021-05-07  2:58   ` David Gibson
2021-05-05 15:53 ` [PATCH v5 4/4] target/ppc: isolated cpu init from translation logic Bruno Larsen (billionai)
2021-05-07  3:00   ` David Gibson [this message]

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