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From: David Gibson <david@gibson.dropbear.id.au>
To: matheus.ferst@eldorado.org.br
Cc: richard.henderson@linaro.org, qemu-devel@nongnu.org,
	f4bug@amsat.org, luis.pires@eldorado.org.br, qemu-ppc@nongnu.org,
	lagarcia@br.ibm.com, bruno.larsen@eldorado.org.br
Subject: Re: [PATCH v5 13/23] target/ppc: Implement PNOP
Date: Tue, 18 May 2021 10:36:58 +1000	[thread overview]
Message-ID: <YKMMKkdpuBzrSC2N@yekko> (raw)
In-Reply-To: <20210517205025.3777947-14-matheus.ferst@eldorado.org.br>

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On Mon, May 17, 2021 at 05:50:15PM -0300, matheus.ferst@eldorado.org.br wrote:
> From: Richard Henderson <richard.henderson@linaro.org>
> 
> The illegal suffix behavior matches what was observed in a
> POWER10 DD2.0 machine.
> 
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>

Applied to ppc-for-6.1, thanks.

> ---
> v5:
> - Remove argument set from PNOP;
> - Use no_overlap_group for invalid suffixes.
> ---
>  target/ppc/insn64.decode                   | 67 ++++++++++++++++++++++
>  target/ppc/translate/fixedpoint-impl.c.inc | 11 ++++
>  2 files changed, 78 insertions(+)
> 
> diff --git a/target/ppc/insn64.decode b/target/ppc/insn64.decode
> index 1965088915..9aa5097a98 100644
> --- a/target/ppc/insn64.decode
> +++ b/target/ppc/insn64.decode
> @@ -28,3 +28,70 @@
>  
>  PADDI           000001 10 0--.-- ..................     \
>                  001110 ..... ..... ................     @PLS_D
> +
> +### Prefixed No-operation Instruction
> +
> +@PNOP           000001 11 0000-- 000000000000000000     \
> +                ................................
> +
> +{
> +  [
> +    ## Invalid suffixes: Branch instruction
> +    # bc[l][a]
> +    INVALID     ................................        \
> +                010000--------------------------        @PNOP
> +    # b[l][a]
> +    INVALID     ................................        \
> +                010010--------------------------        @PNOP
> +    # bclr[l]
> +    INVALID     ................................        \
> +                010011---------------0000010000-        @PNOP
> +    # bcctr[l]
> +    INVALID     ................................        \
> +                010011---------------1000010000-        @PNOP
> +    # bctar[l]
> +    INVALID     ................................        \
> +                010011---------------1000110000-        @PNOP
> +
> +    ## Invalid suffixes: rfebb
> +    INVALID     ................................        \
> +                010011---------------0010010010-        @PNOP
> +
> +    ## Invalid suffixes: context synchronizing other than isync
> +    # sc
> +    INVALID     ................................        \
> +                010001------------------------1-        @PNOP
> +    # scv
> +    INVALID     ................................        \
> +                010001------------------------01        @PNOP
> +    # rfscv
> +    INVALID     ................................        \
> +                010011---------------0001010010-        @PNOP
> +    # rfid
> +    INVALID     ................................        \
> +                010011---------------0000010010-        @PNOP
> +    # hrfid
> +    INVALID     ................................        \
> +                010011---------------0100010010-        @PNOP
> +    # urfid
> +    INVALID     ................................        \
> +                010011---------------0100110010-        @PNOP
> +    # stop
> +    INVALID     ................................        \
> +                010011---------------0101110010-        @PNOP
> +    # mtmsr w/ L=0
> +    INVALID     ................................        \
> +                011111---------0-----0010010010-        @PNOP
> +    # mtmsrd w/ L=0
> +    INVALID     ................................        \
> +                011111---------0-----0010110010-        @PNOP
> +
> +    ## Invalid suffixes: Service Processor Attention
> +    INVALID     ................................        \
> +                000000----------------100000000-        @PNOP
> +  ]
> +
> +  ## Valid suffixes
> +  PNOP          ................................        \
> +                --------------------------------        @PNOP
> +}
> diff --git a/target/ppc/translate/fixedpoint-impl.c.inc b/target/ppc/translate/fixedpoint-impl.c.inc
> index 344a3ed54b..ce034a14a7 100644
> --- a/target/ppc/translate/fixedpoint-impl.c.inc
> +++ b/target/ppc/translate/fixedpoint-impl.c.inc
> @@ -60,3 +60,14 @@ static bool trans_ADDIS(DisasContext *ctx, arg_D *a)
>      a->si <<= 16;
>      return trans_ADDI(ctx, a);
>  }
> +
> +static bool trans_INVALID(DisasContext *ctx, arg_INVALID *a)
> +{
> +    gen_invalid(ctx);
> +    return true;
> +}
> +
> +static bool trans_PNOP(DisasContext *ctx, arg_PNOP *a)
> +{
> +    return true;
> +}

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

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  reply	other threads:[~2021-05-18  1:43 UTC|newest]

Thread overview: 57+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-17 20:50 [PATCH v5 00/23] Base for adding PowerPC 64-bit instructions matheus.ferst
2021-05-17 20:50 ` [PATCH v5 01/23] target/ppc: Introduce gen_icount_io_start matheus.ferst
2021-05-18  0:13   ` David Gibson
2021-05-17 20:50 ` [PATCH v5 02/23] target/ppc: Replace POWERPC_EXCP_STOP with DISAS_EXIT_UPDATE matheus.ferst
2021-05-18  0:14   ` David Gibson
2021-05-17 20:50 ` [PATCH v5 03/23] target/ppc: Replace POWERPC_EXCP_BRANCH with DISAS_NORETURN matheus.ferst
2021-05-18  0:15   ` David Gibson
2021-05-17 20:50 ` [PATCH v5 04/23] target/ppc: Remove DisasContext.exception matheus.ferst
2021-05-18  0:17   ` David Gibson
2021-05-17 20:50 ` [PATCH v5 05/23] target/ppc: Move single-step check to ppc_tr_tb_stop matheus.ferst
2021-05-18  0:19   ` David Gibson
2021-05-17 20:50 ` [PATCH v5 06/23] target/ppc: Tidy exception vs exit_tb matheus.ferst
2021-05-18  0:19   ` David Gibson
2021-05-17 20:50 ` [PATCH v5 07/23] target/ppc: Mark helper_raise_exception* as noreturn matheus.ferst
2021-05-18  0:20   ` David Gibson
2021-05-17 20:50 ` [PATCH v5 08/23] target/ppc: Use translator_loop_temp_check matheus.ferst
2021-05-18  0:20   ` David Gibson
2021-05-17 20:50 ` [PATCH v5 09/23] target/ppc: Introduce macros to check isa extensions matheus.ferst
2021-05-18  0:21   ` David Gibson
2021-05-17 20:50 ` [PATCH v5 10/23] target/ppc: Move page crossing check to ppc_tr_translate_insn matheus.ferst
2021-05-18  0:23   ` David Gibson
2021-05-17 20:50 ` [PATCH v5 11/23] target/ppc: Add infrastructure for prefixed insns matheus.ferst
2021-05-18  0:25   ` David Gibson
2021-05-17 20:50 ` [PATCH v5 12/23] target/ppc: Move ADDI, ADDIS to decodetree, implement PADDI matheus.ferst
2021-05-18  0:35   ` David Gibson
2021-05-17 20:50 ` [PATCH v5 13/23] target/ppc: Implement PNOP matheus.ferst
2021-05-18  0:36   ` David Gibson [this message]
2021-05-17 20:50 ` [PATCH v5 14/23] TCG: add tcg_constant_tl matheus.ferst
2021-05-18  0:37   ` David Gibson
2021-05-17 20:50 ` [PATCH v5 15/23] target/ppc: Move D/DS/X-form integer loads to decodetree matheus.ferst
2021-05-18  0:44   ` David Gibson
2021-05-17 20:50 ` [PATCH v5 16/23] target/ppc: Implement prefixed integer load instructions matheus.ferst
2021-05-18  0:45   ` David Gibson
2021-05-17 20:50 ` [PATCH v5 17/23] target/ppc: Move D/DS/X-form integer stores to decodetree matheus.ferst
2021-05-18  0:47   ` David Gibson
2021-05-17 20:50 ` [PATCH v5 18/23] target/ppc: Implement prefixed integer store instructions matheus.ferst
2021-05-18  0:47   ` David Gibson
2021-05-17 20:50 ` [PATCH v5 19/23] target/ppc: Implement setbc/setbcr/stnbc/setnbcr instructions matheus.ferst
2021-05-18  0:49   ` David Gibson
2021-05-18  9:48   ` Richard Henderson
2021-05-17 20:50 ` [PATCH v5 20/23] target/ppc: Implement cfuged instruction matheus.ferst
2021-05-18  0:51   ` David Gibson
2021-05-17 20:50 ` [PATCH v5 21/23] target/ppc: Implement vcfuged instruction matheus.ferst
2021-05-18  0:52   ` David Gibson
2021-05-18  9:54   ` Richard Henderson
2021-05-17 20:50 ` [PATCH v5 22/23] target/ppc: Move addpcis to decodetree matheus.ferst
2021-05-18  0:53   ` David Gibson
2021-05-18  9:55   ` Richard Henderson
2021-05-17 20:50 ` [PATCH v5 23/23] target/ppc: Move cmp/cmpi/cmpl/cmpli " matheus.ferst
2021-05-18  0:56   ` David Gibson
2021-05-18 10:12   ` Richard Henderson
2021-05-21 17:25     ` Matheus K. Ferst
2021-05-24 18:51       ` Richard Henderson
2021-05-26 15:17         ` Matheus K. Ferst
2021-05-26 16:11           ` Richard Henderson
2021-05-27  1:11           ` David Gibson
2021-05-18  3:58 ` [PATCH v5 00/23] Base for adding PowerPC 64-bit instructions David Gibson

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