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From: David Gibson <david@gibson.dropbear.id.au>
To: matheus.ferst@eldorado.org.br
Cc: richard.henderson@linaro.org, qemu-devel@nongnu.org,
	f4bug@amsat.org, luis.pires@eldorado.org.br, qemu-ppc@nongnu.org,
	lagarcia@br.ibm.com, bruno.larsen@eldorado.org.br
Subject: Re: [PATCH v5 16/23] target/ppc: Implement prefixed integer load instructions
Date: Tue, 18 May 2021 10:45:14 +1000	[thread overview]
Message-ID: <YKMOGp2pEXYDOYWh@yekko> (raw)
In-Reply-To: <20210517205025.3777947-17-matheus.ferst@eldorado.org.br>

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On Mon, May 17, 2021 at 05:50:18PM -0300, matheus.ferst@eldorado.org.br wrote:
> From: Richard Henderson <richard.henderson@linaro.org>
> 
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> Signed-off-by: Matheus Ferst <matheus.ferst@eldorado.org.br>

Applied to ppc-for-6.1, thanks.

> ---
>  target/ppc/insn64.decode                   | 15 +++++++++++++++
>  target/ppc/translate/fixedpoint-impl.c.inc | 16 ++++++++++++++++
>  2 files changed, 31 insertions(+)
> 
> diff --git a/target/ppc/insn64.decode b/target/ppc/insn64.decode
> index 9aa5097a98..547bd1736f 100644
> --- a/target/ppc/insn64.decode
> +++ b/target/ppc/insn64.decode
> @@ -24,6 +24,21 @@
>                  ...... rt:5 ra:5 ................       \
>                  &PLS_D si=%pls_si
>  
> +### Fixed-Point Load Instructions
> +
> +PLBZ            000001 10 0--.-- .................. \
> +                100010 ..... ..... ................     @PLS_D
> +PLHZ            000001 10 0--.-- .................. \
> +                101000 ..... ..... ................     @PLS_D
> +PLHA            000001 10 0--.-- .................. \
> +                101010 ..... ..... ................     @PLS_D
> +PLWZ            000001 10 0--.-- .................. \
> +                100000 ..... ..... ................     @PLS_D
> +PLWA            000001 00 0--.-- .................. \
> +                101001 ..... ..... ................     @PLS_D
> +PLD             000001 00 0--.-- .................. \
> +                111001 ..... ..... ................     @PLS_D
> +
>  ### Fixed-Point Arithmetic Instructions
>  
>  PADDI           000001 10 0--.-- ..................     \
> diff --git a/target/ppc/translate/fixedpoint-impl.c.inc b/target/ppc/translate/fixedpoint-impl.c.inc
> index 6140dd41ca..7687f31d6f 100644
> --- a/target/ppc/translate/fixedpoint-impl.c.inc
> +++ b/target/ppc/translate/fixedpoint-impl.c.inc
> @@ -80,6 +80,16 @@ static bool do_ldst_D(DisasContext *ctx, arg_D *a, bool update, bool store,
>      return do_ldst(ctx, a->rt, a->ra, tcg_constant_tl(a->si), update, store, mop);
>  }
>  
> +static bool do_ldst_PLS_D(DisasContext *ctx, arg_PLS_D *a, bool update,
> +                          bool store, MemOp mop)
> +{
> +    arg_D d;
> +    if (!resolve_PLS_D(ctx, &d, a)) {
> +        return true;
> +    }
> +    return do_ldst_D(ctx, &d, update, store, mop);
> +}
> +
>  static bool do_ldst_X(DisasContext *ctx, arg_X *a, bool update,
>                        bool store, MemOp mop)
>  {
> @@ -91,35 +101,41 @@ TRANS(LBZ, do_ldst_D, false, false, MO_UB)
>  TRANS(LBZX, do_ldst_X, false, false, MO_UB)
>  TRANS(LBZU, do_ldst_D, true, false, MO_UB)
>  TRANS(LBZUX, do_ldst_X, true, false, MO_UB)
> +TRANS(PLBZ, do_ldst_PLS_D, false, false, MO_UB)
>  
>  /* Load Halfword and Zero */
>  TRANS(LHZ, do_ldst_D, false, false, MO_UW)
>  TRANS(LHZX, do_ldst_X, false, false, MO_UW)
>  TRANS(LHZU, do_ldst_D, true, false, MO_UW)
>  TRANS(LHZUX, do_ldst_X, true, false, MO_UW)
> +TRANS(PLHZ, do_ldst_PLS_D, false, false, MO_UW)
>  
>  /* Load Halfword Algebraic */
>  TRANS(LHA, do_ldst_D, false, false, MO_SW)
>  TRANS(LHAX, do_ldst_X, false, false, MO_SW)
>  TRANS(LHAU, do_ldst_D, true, false, MO_SW)
>  TRANS(LHAXU, do_ldst_X, true, false, MO_SW)
> +TRANS(PLHA, do_ldst_PLS_D, false, false, MO_SW)
>  
>  /* Load Word and Zero */
>  TRANS(LWZ, do_ldst_D, false, false, MO_UL)
>  TRANS(LWZX, do_ldst_X, false, false, MO_UL)
>  TRANS(LWZU, do_ldst_D, true, false, MO_UL)
>  TRANS(LWZUX, do_ldst_X, true, false, MO_UL)
> +TRANS(PLWZ, do_ldst_PLS_D, false, false, MO_UL)
>  
>  /* Load Word Algebraic */
>  TRANS64(LWA, do_ldst_D, false, false, MO_SL)
>  TRANS64(LWAX, do_ldst_X, false, false, MO_SL)
>  TRANS64(LWAUX, do_ldst_X, true, false, MO_SL)
> +TRANS64(PLWA, do_ldst_PLS_D, false, false, MO_SL)
>  
>  /* Load Doubleword */
>  TRANS64(LD, do_ldst_D, false, false, MO_Q)
>  TRANS64(LDX, do_ldst_X, false, false, MO_Q)
>  TRANS64(LDU, do_ldst_D, true, false, MO_Q)
>  TRANS64(LDUX, do_ldst_X, true, false, MO_Q)
> +TRANS64(PLD, do_ldst_PLS_D, false, false, MO_Q)
>  
>  /*
>   * Fixed-Point Arithmetic Instructions

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

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  reply	other threads:[~2021-05-18  1:46 UTC|newest]

Thread overview: 57+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-17 20:50 [PATCH v5 00/23] Base for adding PowerPC 64-bit instructions matheus.ferst
2021-05-17 20:50 ` [PATCH v5 01/23] target/ppc: Introduce gen_icount_io_start matheus.ferst
2021-05-18  0:13   ` David Gibson
2021-05-17 20:50 ` [PATCH v5 02/23] target/ppc: Replace POWERPC_EXCP_STOP with DISAS_EXIT_UPDATE matheus.ferst
2021-05-18  0:14   ` David Gibson
2021-05-17 20:50 ` [PATCH v5 03/23] target/ppc: Replace POWERPC_EXCP_BRANCH with DISAS_NORETURN matheus.ferst
2021-05-18  0:15   ` David Gibson
2021-05-17 20:50 ` [PATCH v5 04/23] target/ppc: Remove DisasContext.exception matheus.ferst
2021-05-18  0:17   ` David Gibson
2021-05-17 20:50 ` [PATCH v5 05/23] target/ppc: Move single-step check to ppc_tr_tb_stop matheus.ferst
2021-05-18  0:19   ` David Gibson
2021-05-17 20:50 ` [PATCH v5 06/23] target/ppc: Tidy exception vs exit_tb matheus.ferst
2021-05-18  0:19   ` David Gibson
2021-05-17 20:50 ` [PATCH v5 07/23] target/ppc: Mark helper_raise_exception* as noreturn matheus.ferst
2021-05-18  0:20   ` David Gibson
2021-05-17 20:50 ` [PATCH v5 08/23] target/ppc: Use translator_loop_temp_check matheus.ferst
2021-05-18  0:20   ` David Gibson
2021-05-17 20:50 ` [PATCH v5 09/23] target/ppc: Introduce macros to check isa extensions matheus.ferst
2021-05-18  0:21   ` David Gibson
2021-05-17 20:50 ` [PATCH v5 10/23] target/ppc: Move page crossing check to ppc_tr_translate_insn matheus.ferst
2021-05-18  0:23   ` David Gibson
2021-05-17 20:50 ` [PATCH v5 11/23] target/ppc: Add infrastructure for prefixed insns matheus.ferst
2021-05-18  0:25   ` David Gibson
2021-05-17 20:50 ` [PATCH v5 12/23] target/ppc: Move ADDI, ADDIS to decodetree, implement PADDI matheus.ferst
2021-05-18  0:35   ` David Gibson
2021-05-17 20:50 ` [PATCH v5 13/23] target/ppc: Implement PNOP matheus.ferst
2021-05-18  0:36   ` David Gibson
2021-05-17 20:50 ` [PATCH v5 14/23] TCG: add tcg_constant_tl matheus.ferst
2021-05-18  0:37   ` David Gibson
2021-05-17 20:50 ` [PATCH v5 15/23] target/ppc: Move D/DS/X-form integer loads to decodetree matheus.ferst
2021-05-18  0:44   ` David Gibson
2021-05-17 20:50 ` [PATCH v5 16/23] target/ppc: Implement prefixed integer load instructions matheus.ferst
2021-05-18  0:45   ` David Gibson [this message]
2021-05-17 20:50 ` [PATCH v5 17/23] target/ppc: Move D/DS/X-form integer stores to decodetree matheus.ferst
2021-05-18  0:47   ` David Gibson
2021-05-17 20:50 ` [PATCH v5 18/23] target/ppc: Implement prefixed integer store instructions matheus.ferst
2021-05-18  0:47   ` David Gibson
2021-05-17 20:50 ` [PATCH v5 19/23] target/ppc: Implement setbc/setbcr/stnbc/setnbcr instructions matheus.ferst
2021-05-18  0:49   ` David Gibson
2021-05-18  9:48   ` Richard Henderson
2021-05-17 20:50 ` [PATCH v5 20/23] target/ppc: Implement cfuged instruction matheus.ferst
2021-05-18  0:51   ` David Gibson
2021-05-17 20:50 ` [PATCH v5 21/23] target/ppc: Implement vcfuged instruction matheus.ferst
2021-05-18  0:52   ` David Gibson
2021-05-18  9:54   ` Richard Henderson
2021-05-17 20:50 ` [PATCH v5 22/23] target/ppc: Move addpcis to decodetree matheus.ferst
2021-05-18  0:53   ` David Gibson
2021-05-18  9:55   ` Richard Henderson
2021-05-17 20:50 ` [PATCH v5 23/23] target/ppc: Move cmp/cmpi/cmpl/cmpli " matheus.ferst
2021-05-18  0:56   ` David Gibson
2021-05-18 10:12   ` Richard Henderson
2021-05-21 17:25     ` Matheus K. Ferst
2021-05-24 18:51       ` Richard Henderson
2021-05-26 15:17         ` Matheus K. Ferst
2021-05-26 16:11           ` Richard Henderson
2021-05-27  1:11           ` David Gibson
2021-05-18  3:58 ` [PATCH v5 00/23] Base for adding PowerPC 64-bit instructions David Gibson

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