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Tue, 6 Jul 2021 07:29:12 -0400 (EDT) Date: Tue, 6 Jul 2021 13:29:10 +0200 From: Klaus Jensen To: Padmakar Kalghatgi Subject: Re: [PATCH]: /hw/nvme/ctrl error handling if descriptors are greater than 1024 Message-ID: References: <1c9201d77253$b5708060$20518120$@samsung.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="idt48IeWVdyHxMcv" Content-Disposition: inline In-Reply-To: <1c9201d77253$b5708060$20518120$@samsung.com> Received-SPF: pass client-ip=64.147.123.20; envelope-from=its@irrelevant.dk; helo=wout4-smtp.messagingengine.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: fam@euphon.net, kwolf@redhat.com, qemu-block@nongnu.org, qemu-devel@nongnu.org, mreitz@redhat.com, stefanha@redhat.com, kbusch@kernel.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" --idt48IeWVdyHxMcv Content-Type: text/plain; charset=utf-8; format=flowed Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Hi Padmakar, Patch looks good, but it got messed up by your MUA. You've previously=20 contributed correctly formatted patches, so please revert to that method=20 when sending patches in the future ;) Reviewed-by: Klaus Jensen On Jul 6 16:13, Padmakar Kalghatgi wrote: >From: padmakar > > > >if the number of descriptors or pages is more than 1024, > >dma writes or reads will result in failure. Hence, we check > >if the number of descriptors or pages is more than 1024 > >in the nvme module and return Internal Device error. > > > >Signed-off-by: Padmakar Kalghatgi > >--- > >hw/nvme/ctrl.c | 14 ++++++++++++++ > >hw/nvme/trace-events | 1 + > >2 files changed, 15 insertions(+) > > > >diff --git a/hw/nvme/ctrl.c b/hw/nvme/ctrl.c > >index 40a7efc..082592f 100644 > >--- a/hw/nvme/ctrl.c > >+++ b/hw/nvme/ctrl.c > >@@ -602,6 +602,20 @@ static uint16_t nvme_map_addr(NvmeCtrl *n, NvmeSg *sg, >hwaddr addr, size_t len) > > return NVME_SUCCESS; > > } > >+ /* > >+ * The QEMU has an inherent issue where in if the no. > >+ * of descriptors is more than 1024, it will result in > >+ * failure during the dma write or reads. Hence, we need > >+ * to return the error. > >+ */ > >+ > >+ if (((sg->flags & NVME_SG_DMA) && ((sg->qsg.nsg + 1) > IOV_MAX)) || > >+ ((sg->iov.niov + 1) > IOV_MAX)) { > >+ NVME_GUEST_ERR(pci_nvme_ub_sg_desc_toohigh, > >+ "number of descriptors is greater than 1024"); > >+ return NVME_INTERNAL_DEV_ERROR; > >+ } > >+ > > trace_pci_nvme_map_addr(addr, len); > > if (nvme_addr_is_cmb(n, addr)) { > >diff --git a/hw/nvme/trace-events b/hw/nvme/trace-events > >index ea33d0c..bfe1a3b 100644 > >--- a/hw/nvme/trace-events > >+++ b/hw/nvme/trace-events > >@@ -202,3 +202,4 @@ pci_nvme_ub_db_wr_invalid_cqhead(uint32_t qid, uint16_t >new_head) "completion qu > >pci_nvme_ub_db_wr_invalid_sq(uint32_t qid) "submission queue doorbell write >for nonexistent queue, sqid=3D%"PRIu32", ignoring" > >pci_nvme_ub_db_wr_invalid_sqtail(uint32_t qid, uint16_t new_tail) >"submission queue doorbell write value beyond queue size, sqid=3D%"PRIu32", >new_head=3D%"PRIu16", ignoring" > >pci_nvme_ub_unknown_css_value(void) "unknown value in cc.css field" > >+pci_nvme_ub_sg_desc_toohigh(void) "the number of sg descriptors is too >high" > >--=20 > >2.7.0.windows.1 > > > --idt48IeWVdyHxMcv Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQEzBAEBCAAdFiEEUigzqnXi3OaiR2bATeGvMW1PDekFAmDkPoAACgkQTeGvMW1P DekPzQgAwv/eg+pGjt2Lsru5SeC3zEs/xc40lPQKaehgfXHOSmweVNXwSnzwyqxM FlWvpndjMXbQ4TTesb6VTf9q7c3IMmyIV10D+mwLOnz579hbu9PWklnW7ASvswYj balJXvr3uTYPULyROezkjpmQtoie6j5e3YUjsUua/DWoPd1RxB/p1MAQWa+peJ3u XflonyfH4jgYoLihILbiTGRliWiAzhEkPc/36A9qSpDdPM4Mxd+JbfXDhrQusXbO pavHOzmi2NuZF70NeYPrqyXLTnSek3c/CWqoY3IO10b/ko2tA89B/f9k2aTXcGEm BKYcaA8n3RxPNZNWySi2DXCoa+Ot4g== =0kPO -----END PGP SIGNATURE----- --idt48IeWVdyHxMcv--