From: Stafford Horne <shorne@gmail.com>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: qemu-devel@nongnu.org
Subject: Re: [PATCH 2/4] target/openrisc: Use tcg_constant_tl for dc->R0
Date: Sat, 10 Jul 2021 21:11:03 +0900 [thread overview]
Message-ID: <YOmOV6gJSAw+dTmL@antec> (raw)
In-Reply-To: <20210708213754.830485-3-richard.henderson@linaro.org>
On Thu, Jul 08, 2021 at 02:37:52PM -0700, Richard Henderson wrote:
> The temp allocated for tcg_const_tl is auto-freed at branches,
> but pure constants are not. So we can remove the extra hoop
> jumping in trans_l_swa.
This is nice.
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Stafford Horne <shorne@gmail.com>
next prev parent reply other threads:[~2021-07-10 12:12 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-08 21:37 [PATCH 0/4] target/openrisc: Use tcg_constant_* Richard Henderson
2021-07-08 21:37 ` [PATCH 1/4] " Richard Henderson
2021-07-09 16:21 ` Philippe Mathieu-Daudé
2021-07-09 21:02 ` Stafford Horne
2021-07-08 21:37 ` [PATCH 2/4] target/openrisc: Use tcg_constant_tl for dc->R0 Richard Henderson
2021-07-10 12:11 ` Stafford Horne [this message]
2021-07-08 21:37 ` [PATCH 3/4] target/openrisc: Cache constant 0 in DisasContext Richard Henderson
2021-07-09 16:22 ` Philippe Mathieu-Daudé
2021-07-09 20:58 ` Stafford Horne
2021-07-08 21:37 ` [PATCH 4/4] target/openrisc: Use dc->zero in gen_add, gen_addc Richard Henderson
2021-07-09 21:03 ` Stafford Horne
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