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From: David Gibson <david@gibson.dropbear.id.au>
To: "Cédric Le Goater" <clg@kaod.org>
Cc: qemu-ppc@nongnu.org, Greg Kurz <groug@kaod.org>, qemu-devel@nongnu.org
Subject: Re: [PATCH 13/26] ppc/pnv: Add POWER10 quads
Date: Wed, 25 Aug 2021 16:09:40 +1000	[thread overview]
Message-ID: <YSXepFEmvf9luXo0@yekko> (raw)
In-Reply-To: <20210809134547.689560-14-clg@kaod.org>

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On Mon, Aug 09, 2021 at 03:45:34PM +0200, Cédric Le Goater wrote:
> Still needs some refinements on the XSCOM registers.
> 
> Signed-off-by: Cédric Le Goater <clg@kaod.org>
> ---
>  include/hw/ppc/pnv.h |  3 +++
>  hw/ppc/pnv.c         | 34 ++++++++++++++++++++++++++++++++++
>  2 files changed, 37 insertions(+)
> 
> diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h
> index a299fbc7f25c..13495423283a 100644
> --- a/include/hw/ppc/pnv.h
> +++ b/include/hw/ppc/pnv.h
> @@ -128,6 +128,9 @@ struct Pnv10Chip {
>      Pnv9Psi      psi;
>      PnvLpcController lpc;
>      PnvOCC       occ;
> +
> +    uint32_t     nr_quads;
> +    PnvQuad      *quads;
>  };
>  
>  #define PNV10_PIR2FUSEDCORE(pir) (((pir) >> 3) & 0xf)
> diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
> index f75d90e61fa8..f670d97c5f91 100644
> --- a/hw/ppc/pnv.c
> +++ b/hw/ppc/pnv.c
> @@ -1605,6 +1605,34 @@ static void pnv_chip_power10_instance_init(Object *obj)
>      object_initialize_child(obj, "occ",  &chip10->occ, TYPE_PNV10_OCC);
>  }
>  
> +
> +static void pnv_chip_power10_quad_realize(Pnv10Chip *chip10, Error **errp)
> +{
> +    PnvChip *chip = PNV_CHIP(chip10);
> +    int i;
> +
> +    chip10->nr_quads = DIV_ROUND_UP(chip->nr_cores, 4);
> +    chip10->quads = g_new0(PnvQuad, chip10->nr_quads);
> +
> +    for (i = 0; i < chip10->nr_quads; i++) {
> +        char eq_name[32];
> +        PnvQuad *eq = &chip10->quads[i];
> +        PnvCore *pnv_core = chip->cores[i * 4];
> +        int core_id = CPU_CORE(pnv_core)->core_id;
> +
> +        snprintf(eq_name, sizeof(eq_name), "eq[%d]", core_id);
> +        object_initialize_child_with_props(OBJECT(chip), eq_name, eq,
> +                                           sizeof(*eq), TYPE_PNV_QUAD,
> +                                           &error_fatal, NULL);
> +
> +        object_property_set_int(OBJECT(eq), "id", core_id, &error_fatal);

"id" might not be a good name for this, since "id" on QOM objects is
nearly always the (usually) user assigned name - which is a string.

> +        qdev_realize(DEVICE(eq), NULL, &error_fatal);
> +
> +        pnv_xscom_add_subregion(chip, PNV10_XSCOM_EQ_BASE(eq->id),
> +                                &eq->xscom_regs);
> +    }
> +}
> +
>  static void pnv_chip_power10_realize(DeviceState *dev, Error **errp)
>  {
>      PnvChipClass *pcc = PNV_CHIP_GET_CLASS(dev);
> @@ -1626,6 +1654,12 @@ static void pnv_chip_power10_realize(DeviceState *dev, Error **errp)
>          return;
>      }
>  
> +    pnv_chip_power10_quad_realize(chip10, &local_err);
> +    if (local_err) {
> +        error_propagate(errp, local_err);
> +        return;
> +    }
> +
>      /* XIVE2 interrupt controller (POWER10) */
>      object_property_set_int(OBJECT(&chip10->xive), "ic-bar",
>                              PNV10_XIVE2_IC_BASE(chip), &error_fatal);

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

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  reply	other threads:[~2021-08-25  6:34 UTC|newest]

Thread overview: 49+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-08-09 13:45 [PATCH 00/26] ppc/pnv: Extend the powernv10 machine Cédric Le Goater
2021-08-09 13:45 ` [PATCH 01/26] ppc: Add a POWER10 DD2 CPU Cédric Le Goater
2021-08-20 13:40   ` Greg Kurz
2021-08-30  7:10     ` Cédric Le Goater
2021-08-09 13:45 ` [PATCH 02/26] ppc/pnv: Change the POWER10 machine to support DD2 only Cédric Le Goater
2021-08-20 13:41   ` Greg Kurz
2021-08-09 13:45 ` [PATCH 03/26] ppc/pnv: powerpc_excp: Do not discard HDECR exception when entering power-saving mode Cédric Le Goater
2021-08-09 13:45 ` [PATCH 04/26] ppc/pnv: Use a simple incrementing index for the chip-id Cédric Le Goater
2021-08-20 13:51   ` Greg Kurz
2021-08-30  7:11     ` Cédric Le Goater
2021-08-09 13:45 ` [PATCH 05/26] ppc/pnv: Distribute RAM among the chips Cédric Le Goater
2021-08-20 14:08   ` Greg Kurz
2021-08-30  7:14     ` Cédric Le Goater
2021-08-09 13:45 ` [PATCH 06/26] ppc/pnv: add a chip topology index for POWER10 Cédric Le Goater
2021-08-20 14:12   ` Greg Kurz
2021-08-30  7:15     ` Cédric Le Goater
2021-08-09 13:45 ` [PATCH 07/26] ppc/xive: Export PQ get/set routines Cédric Le Goater
2021-08-09 13:45 ` [PATCH 08/26] ppc/xive: Export xive_presenter_notify() Cédric Le Goater
2021-08-09 13:45 ` [PATCH 09/26] ppc/xive2: Introduce a XIVE2 core framework Cédric Le Goater
2021-08-10  6:06   ` David Gibson
2021-08-10 13:04     ` Cédric Le Goater
2021-08-23 15:15   ` Greg Kurz
2021-08-30  7:17     ` Cédric Le Goater
2021-08-09 13:45 ` [PATCH 10/26] ppc/xive2: Introduce a presenter matching routine Cédric Le Goater
2021-08-25  6:01   ` David Gibson
2021-08-30  7:15     ` Cédric Le Goater
2021-08-09 13:45 ` [PATCH 11/26] ppc/pnv: Add a XIVE2 controller to the POWER10 chip Cédric Le Goater
2021-08-09 13:45 ` [PATCH 12/26] ppc/pnv: Add a OCC model for POWER10 Cédric Le Goater
2021-08-25  6:06   ` David Gibson
2021-08-09 13:45 ` [PATCH 13/26] ppc/pnv: Add POWER10 quads Cédric Le Goater
2021-08-25  6:09   ` David Gibson [this message]
2021-08-31 13:45     ` Cédric Le Goater
2021-08-09 13:45 ` [PATCH 14/26] ppc/pnv: Add model for POWER10 PHB5 PCIe Host bridge Cédric Le Goater
2021-08-09 13:45 ` [PATCH 15/26] ppc/pnv: Add a HOMER model to POWER10 Cédric Le Goater
2021-08-25  6:12   ` David Gibson
2021-08-09 13:45 ` [PATCH 16/26] ppc/psi: Add support for StoreEOI and 64k ESB pages (POWER10) Cédric Le Goater
2021-08-09 13:45 ` [PATCH 17/26] ppc/xive2: Add support for notification injection on ESB pages Cédric Le Goater
2021-08-09 13:45 ` [PATCH 18/26] ppc/xive: Add support for PQ state bits offload Cédric Le Goater
2021-08-09 13:45 ` [PATCH 19/26] ppc/pnv: Add support for PQ offload on PHB5 Cédric Le Goater
2021-08-09 13:45 ` [PATCH 20/26] ppc/pnv: Add support for PHB5 "Address-based trigger" mode Cédric Le Goater
2021-08-09 13:45 ` [PATCH 21/26] pnv/xive2: Introduce new capability bits Cédric Le Goater
2021-08-09 13:45 ` [PATCH 22/26] ppc/pnv: add XIVE Gen2 TIMA support Cédric Le Goater
2021-08-09 13:45 ` [PATCH 23/26] pnv/xive2: Add support XIVE2 P9-compat mode (or Gen1) Cédric Le Goater
2021-08-09 13:45 ` [PATCH 24/26] xive2: Add a get_config() handler for the router configuration Cédric Le Goater
2021-08-09 13:45 ` [PATCH 25/26] pnv/xive2: Add support for automatic save&restore Cédric Le Goater
2021-08-09 13:45 ` [PATCH 26/26] pnv/xive2: Add support for 8bits thread id Cédric Le Goater
2021-08-10  3:07 ` [PATCH 00/26] ppc/pnv: Extend the powernv10 machine David Gibson
2021-08-10  3:12 ` David Gibson
2021-08-10  8:58   ` Cédric Le Goater

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