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From: David Gibson <david@gibson.dropbear.id.au>
To: Fabiano Rosas <farosas@linux.ibm.com>
Cc: richard.henderson@linaro.org, danielhb413@gmail.com,
	qemu-ppc@nongnu.org, qemu-devel@nongnu.org, clg@kaod.org
Subject: Re: [PATCH v2 5/7] target/ppc: Add MSR_ILE support to ppc_interrupts_little_endian
Date: Thu, 6 Jan 2022 16:30:48 +1100	[thread overview]
Message-ID: <YdZ+iCCCcqrA1EBs@yekko> (raw)
In-Reply-To: <20220105204029.4058500-6-farosas@linux.ibm.com>

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On Wed, Jan 05, 2022 at 05:40:27PM -0300, Fabiano Rosas wrote:
> Some CPUs set ILE via an MSR bit. We can make
> ppc_interrupts_little_endian handle that case as well. Now we have a
> centralized way of determining the endianness of interrupts.
> 
> This change has no functional impact.
> 
> Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com>

Reviewed-by: David Gibson <david@gibson.dropbear.id.au>

> ---
>  target/ppc/cpu.h | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
> index a6fc857ad4..f99cd0ea92 100644
> --- a/target/ppc/cpu.h
> +++ b/target/ppc/cpu.h
> @@ -2733,7 +2733,7 @@ static inline bool ppc_interrupts_little_endian(PowerPCCPU *cpu, bool hv)
>  {
>      PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu);
>      CPUPPCState *env = &cpu->env;
> -    bool ile = false;
> +    bool ile;
>  
>      if (hv && env->has_hv_mode) {
>          if (is_isa300(pcc)) {
> @@ -2744,6 +2744,8 @@ static inline bool ppc_interrupts_little_endian(PowerPCCPU *cpu, bool hv)
>  
>      } else if (pcc->lpcr_mask & LPCR_ILE) {
>          ile = !!(env->spr[SPR_LPCR] & LPCR_ILE);
> +    } else {
> +        ile = !!(msr_ile);
>      }
>  
>      return ile;

-- 
David Gibson			| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au	| minimalist, thank you.  NOT _the_ _other_
				| _way_ _around_!
http://www.ozlabs.org/~dgibson

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  reply	other threads:[~2022-01-06  5:37 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-01-05 20:40 [PATCH v2 0/7] target/ppc: powerpc_excp improvements (2/n) Fabiano Rosas
2022-01-05 20:40 ` [PATCH v2 1/7] target/ppc: powerpc_excp: Extract software TLB logging into a function Fabiano Rosas
2022-01-06  3:55   ` David Gibson
2022-01-07  1:37   ` Richard Henderson
2022-01-05 20:40 ` [PATCH v2 2/7] target/ppc: powerpc_excp: Keep 60x soft MMU logs active Fabiano Rosas
2022-01-06  5:26   ` David Gibson
2022-01-07  1:40   ` Richard Henderson
2022-01-05 20:40 ` [PATCH v2 3/7] target/ppc: powerpc_excp: Group unimplemented exceptions Fabiano Rosas
2022-01-06  5:26   ` David Gibson
2022-01-07  3:07   ` Richard Henderson
2022-01-05 20:40 ` [PATCH v2 4/7] target/ppc: Add HV support to ppc_interrupts_little_endian Fabiano Rosas
2022-01-06  5:30   ` David Gibson
2022-01-06 13:05     ` Cédric Le Goater
2022-01-05 20:40 ` [PATCH v2 5/7] target/ppc: Add MSR_ILE " Fabiano Rosas
2022-01-06  5:30   ` David Gibson [this message]
2022-01-05 20:40 ` [PATCH v2 6/7] target/ppc: Use ppc_interrupts_little_endian in powerpc_excp Fabiano Rosas
2022-01-06  5:31   ` David Gibson
2022-01-05 20:40 ` [PATCH v2 7/7] target/ppc: Introduce a wrapper for powerpc_excp Fabiano Rosas
2022-01-06  5:31   ` David Gibson

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