From: David Gibson <david@gibson.dropbear.id.au>
To: Fabiano Rosas <farosas@linux.ibm.com>
Cc: richard.henderson@linaro.org, danielhb413@gmail.com,
qemu-ppc@nongnu.org, qemu-devel@nongnu.org, clg@kaod.org
Subject: Re: [PATCH 7/8] target/ppc: 405: External exception cleanup
Date: Tue, 11 Jan 2022 13:28:15 +1100 [thread overview]
Message-ID: <YdzrP2Gb+sbSlI1X@yekko> (raw)
In-Reply-To: <20220110181546.4131853-8-farosas@linux.ibm.com>
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On Mon, Jan 10, 2022 at 03:15:45PM -0300, Fabiano Rosas wrote:
> 405 has no MSR_HV and EPR is BookE only so we can remove it all.
>
> Signed-off-by: Fabiano Rosas <farosas@linux.ibm.com>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
> ---
> target/ppc/excp_helper.c | 37 -------------------------------------
> 1 file changed, 37 deletions(-)
>
> diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
> index 82ade5d7bd..f7b9af5065 100644
> --- a/target/ppc/excp_helper.c
> +++ b/target/ppc/excp_helper.c
> @@ -464,44 +464,7 @@ static void powerpc_excp_40x(PowerPCCPU *cpu, int excp)
> msr |= env->error_code;
> break;
> case POWERPC_EXCP_EXTERNAL: /* External input */
> - {
> - bool lpes0;
> -
> - cs = CPU(cpu);
> -
> - /*
> - * Exception targeting modifiers
> - *
> - * LPES0 is supported on POWER7/8/9
> - * LPES1 is not supported (old iSeries mode)
> - *
> - * On anything else, we behave as if LPES0 is 1
> - * (externals don't alter MSR:HV)
> - */
> -#if defined(TARGET_PPC64)
> - if (excp_model == POWERPC_EXCP_POWER7 ||
> - excp_model == POWERPC_EXCP_POWER8 ||
> - excp_model == POWERPC_EXCP_POWER9 ||
> - excp_model == POWERPC_EXCP_POWER10) {
> - lpes0 = !!(env->spr[SPR_LPCR] & LPCR_LPES0);
> - } else
> -#endif /* defined(TARGET_PPC64) */
> - {
> - lpes0 = true;
> - }
> -
> - if (!lpes0) {
> - new_msr |= (target_ulong)MSR_HVB;
> - new_msr |= env->msr & ((target_ulong)1 << MSR_RI);
> - srr0 = SPR_HSRR0;
> - srr1 = SPR_HSRR1;
> - }
> - if (env->mpic_proxy) {
> - /* IACK the IRQ on delivery */
> - env->spr[SPR_BOOKE_EPR] = ldl_phys(cs->as, env->mpic_iack);
> - }
> break;
> - }
> case POWERPC_EXCP_ALIGN: /* Alignment exception */
> /* Get rS/rD and rA from faulting opcode */
> /*
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
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next prev parent reply other threads:[~2022-01-11 2:42 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-01-10 18:15 [PATCH 0/8] target/ppc: powerpc_excp improvements [40x] (3/n) Fabiano Rosas
2022-01-10 18:15 ` [PATCH 1/8] target/ppc: 405: Add missing MSR bits to msr_mask Fabiano Rosas
2022-01-11 2:04 ` David Gibson
2022-01-11 2:07 ` David Gibson
2022-01-17 21:12 ` Fabiano Rosas
2022-01-18 8:40 ` David Gibson
2022-01-10 18:15 ` [PATCH 2/8] target/ppc: 405: Add missing exception handlers Fabiano Rosas
2022-01-11 2:10 ` David Gibson
2022-01-14 21:46 ` Fabiano Rosas
2022-01-15 7:05 ` David Gibson
2022-01-10 18:15 ` [PATCH 3/8] target/ppc: Introduce powerpc_excp_40x Fabiano Rosas
2022-01-11 2:20 ` David Gibson
2022-01-10 18:15 ` [PATCH 4/8] squash " Fabiano Rosas
2022-01-10 18:51 ` BALATON Zoltan
2022-01-10 19:00 ` Fabiano Rosas
2022-01-10 18:15 ` [PATCH 5/8] target/ppc: 405: Critical exceptions cleanup Fabiano Rosas
2022-01-11 2:26 ` David Gibson
2022-01-10 18:15 ` [PATCH 6/8] target/ppc: 405: Machine check exception cleanup Fabiano Rosas
2022-01-11 2:26 ` David Gibson
2022-01-10 18:15 ` [PATCH 7/8] target/ppc: 405: External " Fabiano Rosas
2022-01-11 2:28 ` David Gibson [this message]
2022-01-10 18:15 ` [PATCH 8/8] target/ppc: 405: System call " Fabiano Rosas
2022-01-11 2:31 ` David Gibson
2022-01-11 12:48 ` Fabiano Rosas
2022-01-11 8:37 ` [PATCH 0/8] target/ppc: powerpc_excp improvements [40x] (3/n) Cédric Le Goater
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