From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8D9ABC433EF for ; Thu, 17 Feb 2022 01:54:37 +0000 (UTC) Received: from localhost ([::1]:58398 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1nKW0B-0003o4-Rx for qemu-devel@archiver.kernel.org; Wed, 16 Feb 2022 20:54:36 -0500 Received: from eggs.gnu.org ([209.51.188.92]:42034) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nKVeB-0002cQ-CM; Wed, 16 Feb 2022 20:31:52 -0500 Received: from gandalf.ozlabs.org ([150.107.74.76]:56469) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1nKVe6-0002QJ-3C; Wed, 16 Feb 2022 20:31:50 -0500 Received: by gandalf.ozlabs.org (Postfix, from userid 1007) id 4Jzck42GgQz4xsg; Thu, 17 Feb 2022 12:31:40 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gibson.dropbear.id.au; s=201602; t=1645061500; bh=zgp0c6UZFPt/q0YiwTSr6I0elEOep5HGpHEkrqwYA3k=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=I0VdBeD7LEsLEJpBFeVXiECtr0gSnmFpO9RMhEDoUwBT0OoppO4TsPMj8FxZuR5do fS2/o4O0bj3dl6tlEkcbHzq7vNcpBgyPLQ5IMQLzmtVkfFx8+zLTPpCLOk/l9zKsWJ lTLonihvKkCg8oXOJDJd04otsu4dK2tENeTZw3XQ= Date: Thu, 17 Feb 2022 10:32:00 +1100 From: David Gibson To: Fabiano Rosas Subject: Re: [PATCH 26/27] target/ppc: cpu_init: Move check_pow and QOM macros to a header Message-ID: References: <20220215214148.1848266-1-farosas@linux.ibm.com> <20220215214148.1848266-27-farosas@linux.ibm.com> <87czjnx8od.fsf@linux.ibm.com> MIME-Version: 1.0 Content-Type: multipart/signed; micalg=pgp-sha256; protocol="application/pgp-signature"; boundary="hS8cpMerK1O2zhbO" Content-Disposition: inline In-Reply-To: <87czjnx8od.fsf@linux.ibm.com> Received-SPF: pass client-ip=150.107.74.76; envelope-from=dgibson@gandalf.ozlabs.org; helo=gandalf.ozlabs.org X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, HEADER_FROM_DIFFERENT_DOMAINS=0.249, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, qemu-ppc@nongnu.org, qemu-devel@nongnu.org, clg@kaod.org Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" --hS8cpMerK1O2zhbO Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable On Wed, Feb 16, 2022 at 10:06:26AM -0300, Fabiano Rosas wrote: > David Gibson writes: >=20 > > On Tue, Feb 15, 2022 at 06:41:47PM -0300, Fabiano Rosas wrote: > >> These will need to be accessed from other files once we move the CPUs > >> code to separate files. > >>=20 > >> Signed-off-by: Fabiano Rosas > >> --- > >> target/ppc/cpu.h | 57 +++++++++++++++++++++++++++++++++++++++++++ > >> target/ppc/cpu_init.c | 55 ----------------------------------------- > >> 2 files changed, 57 insertions(+), 55 deletions(-) > >>=20 > >> diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h > >> index 6a06a7f533..ba0739c43b 100644 > >> --- a/target/ppc/cpu.h > >> +++ b/target/ppc/cpu.h > >> @@ -2733,4 +2733,61 @@ void dump_mmu(CPUPPCState *env); > >> void ppc_maybe_bswap_register(CPUPPCState *env, uint8_t *mem_buf, int= len); > >> void ppc_store_vscr(CPUPPCState *env, uint32_t vscr); > >> uint32_t ppc_get_vscr(CPUPPCState *env); > >> + > >> +/********************************************************************= *********/ > >> +/* Power management enable checks = */ > >> +static inline int check_pow_none(CPUPPCState *env) > >> +{ > >> + return 0; > >> +} > >> + > >> +static inline int check_pow_nocheck(CPUPPCState *env) > >> +{ > >> + return 1; > >> +} > >> + > >> +static inline int check_pow_hid0(CPUPPCState *env) > > > > I'm a little nervous about moving this to a more exposed location. By > > definition the HID register is implementation dependent, and we can > > see immediately below that not all things use the same interpretation > > of it in practice. So at the very least it seems like it has a bad > > name to be exposed more widely. It also seems like it might better > > belong next to the code for the cpus that actually use this version. >=20 > Good point. Since these are quite simple it might be best to duplicate > them when doing the split between the families. I'm doing the same for > vscr_init. Right, that sounds like a good idea to me. --=20 David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. 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