From: Stafford Horne <shorne@gmail.com>
To: "Philippe Mathieu-Daudé" <f4bug@amsat.org>
Cc: QEMU Development <qemu-devel@nongnu.org>, Jia Liu <proljc@gmail.com>
Subject: Re: [PATCH 1/4] hw/openrisc/openrisc_sim: Create machine state for or1ksim
Date: Thu, 10 Feb 2022 21:16:08 +0900 [thread overview]
Message-ID: <YgUCCOmt2J83ii/p@antec> (raw)
In-Reply-To: <e0ea2b85-1ba3-c9d2-3afb-a3eb3ed4aea3@amsat.org>
On Thu, Feb 10, 2022 at 12:05:22PM +0100, Philippe Mathieu-Daudé wrote:
> On 10/2/22 07:30, Stafford Horne wrote:
> > This will allow us to attach machine state attributes like
> > the device tree fdt.
> >
> > Signed-off-by: Stafford Horne <shorne@gmail.com>
> > ---
> > hw/openrisc/openrisc_sim.c | 31 +++++++++++++++++++++++++++++--
> > 1 file changed, 29 insertions(+), 2 deletions(-)
>
> > @@ -141,6 +153,7 @@ static void openrisc_sim_init(MachineState *machine)
> > ram_addr_t ram_size = machine->ram_size;
> > const char *kernel_filename = machine->kernel_filename;
> > OpenRISCCPU *cpus[2] = {};
> > + Or1ksimState *s = OR1KSIM_MACHINE(machine);
>
> This change belong to patch #3.
Yes, when I was splitting this patch out I left it here because I was
"preparing". But it is not being used, so fair enough.
> Otherwise:
> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Thanks
> > MemoryRegion *ram;
> > qemu_irq serial_irq;
> > int n;
> > @@ -183,8 +196,10 @@ static void openrisc_sim_init(MachineState *machine)
> > openrisc_load_kernel(ram_size, kernel_filename);
> > }
next prev parent reply other threads:[~2022-02-10 12:27 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-02-10 6:30 [PATCH 0/4] OpenRISC Device Tree Support Stafford Horne
2022-02-10 6:30 ` [PATCH 1/4] hw/openrisc/openrisc_sim: Create machine state for or1ksim Stafford Horne
2022-02-10 11:05 ` Philippe Mathieu-Daudé via
2022-02-10 12:16 ` Stafford Horne [this message]
2022-02-10 6:30 ` [PATCH 2/4] hw/openrisc/openrisc_sim: Paramatarize initialization Stafford Horne
2022-02-10 11:07 ` Philippe Mathieu-Daudé via
2022-02-10 12:18 ` Stafford Horne
2022-02-10 6:30 ` [PATCH 3/4] hw/openrisc/openrisc_sim; Add support for loading a decice tree Stafford Horne
2022-02-10 11:10 ` Philippe Mathieu-Daudé via
2022-02-10 12:34 ` Stafford Horne
2022-02-17 18:18 ` Peter Maydell
2022-02-17 21:39 ` Stafford Horne
2022-02-18 11:46 ` Peter Maydell
2022-02-10 6:30 ` [PATCH 4/4] hw/openrisc/openrisc_sim: Add support for initrd loading Stafford Horne
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