From: Klaus Jensen <its@irrelevant.dk>
To: zhenwei pi <pizhenwei@bytedance.com>
Cc: kbusch@kernel.org, k.jensen@samsung.com, qemu-devel@nongnu.org,
qemu-block@nongnu.org, hch@lst.de
Subject: Re: [PATCH 0/2] hw/nvme: support smart AEN
Date: Mon, 9 May 2022 13:12:56 +0200 [thread overview]
Message-ID: <Ynj3OArUqeiCMyVc@apples> (raw)
In-Reply-To: <20220507072644.263105-1-pizhenwei@bytedance.com>
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On May 7 15:26, zhenwei pi wrote:
> Hi,
> In this series, firstly introduce smart related bits of aen cfg, then
> support this in oaes.
>
> Linux guest does not support this currently, I also send a series to
> enable smart AEN:
> https://lore.kernel.org/lkml/20220507065026.260306-1-pizhenwei@bytedance.com/T/#t
>
> Test the two series together, works fine.
>
> Zhenwei Pi (2):
> hw/nvme: introduce smart bits of aen cfg
> hw/nvme: support smart AEN
>
> hw/nvme/ctrl.c | 9 ++++++++-
> include/block/nvme.h | 8 +++++++-
> 2 files changed, 15 insertions(+), 2 deletions(-)
>
I'm not quite sure what you are trying to achieve here. Bits 0 through 7
are reserved in OAES, they are not optional.
We already simply accept whatever the host configured with the
Asynchronous Event Configuration feature. And you added the support for
triggering custom AENs for those through the monitor.
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next prev parent reply other threads:[~2022-05-09 11:35 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-07 7:26 [PATCH 0/2] hw/nvme: support smart AEN zhenwei pi
2022-05-07 7:26 ` [PATCH 1/2] hw/nvme: introduce smart bits of aen cfg zhenwei pi
2022-05-07 7:26 ` [PATCH 2/2] hw/nvme: support smart AEN zhenwei pi
2022-05-09 11:12 ` Klaus Jensen [this message]
2022-05-09 12:36 ` Re: [PATCH 0/2] " zhenwei pi
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