From: Stafford Horne <shorne@gmail.com>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: QEMU Development <qemu-devel@nongnu.org>,
Openrisc <openrisc@lists.librecores.org>
Subject: Re: [PATCH v2 07/11] target/openrisc: Add interrupted CPU to log
Date: Tue, 5 Jul 2022 05:26:29 +0900 [thread overview]
Message-ID: <YsNM9QPAjzll8Olo@antec> (raw)
In-Reply-To: <4bfc20ec-962b-2017-f2ba-26cd65bd3d9f@linaro.org>
On Mon, Jul 04, 2022 at 03:34:52PM +0530, Richard Henderson wrote:
> On 7/4/22 02:58, Stafford Horne wrote:
> > When we are tracing it's helpful to know which CPU's are getting
> > interrupted, att that detail to the log line.
>
> "at".
>
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Actually it should be "add", thanks I fixed it.
-Stafford
next prev parent reply other threads:[~2022-07-04 20:29 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-07-03 21:28 [PATCH v2 00/11] OpenRISC Virtual Machine Stafford Horne
2022-07-03 21:28 ` [PATCH v2 01/11] hw/openrisc: Split re-usable boot time apis out to boot.c Stafford Horne
2022-07-03 21:28 ` [PATCH v2 02/11] target/openrisc: Fix memory reading in debugger Stafford Horne
2022-07-04 10:01 ` Richard Henderson
2022-07-03 21:28 ` [PATCH v2 03/11] goldfish_rtc: Add endianness property Stafford Horne
2022-07-04 2:50 ` Anup Patel
2022-07-04 9:59 ` Richard Henderson
2022-07-04 10:16 ` Laurent Vivier
2022-07-04 10:21 ` Richard Henderson
2022-07-04 10:23 ` Laurent Vivier
2022-07-04 20:40 ` Stafford Horne
2022-07-05 0:53 ` Jason A. Donenfeld
2022-07-04 20:32 ` Stafford Horne
2022-07-03 21:28 ` [PATCH v2 04/11] hw/openrisc: Add the OpenRISC virtual machine Stafford Horne
2022-07-03 21:28 ` [PATCH v2 05/11] hw/openrisc: Add PCI bus support to virt Stafford Horne
2022-07-03 21:28 ` [PATCH v2 06/11] hw/openrisc: Initialize timer time at startup Stafford Horne
2022-07-04 10:03 ` Richard Henderson
2022-07-04 20:32 ` [PATCH v2 06/11] hw/openrisc: Initialize timer time at startupi Stafford Horne
2022-07-03 21:28 ` [PATCH v2 07/11] target/openrisc: Add interrupted CPU to log Stafford Horne
2022-07-04 10:04 ` Richard Henderson
2022-07-04 20:26 ` Stafford Horne [this message]
2022-07-03 21:28 ` [PATCH v2 08/11] target/openrisc: Enable MTTCG Stafford Horne
2022-07-04 10:07 ` Richard Henderson
2022-07-04 20:31 ` Stafford Horne
2022-07-03 21:28 ` [PATCH v2 09/11] target/openrisc: Interrupt handling fixes Stafford Horne
2022-07-04 10:20 ` Richard Henderson
2022-07-03 21:28 ` [PATCH v2 10/11] hw/openrisc: virt: pass random seed to fdt Stafford Horne
2022-07-04 10:22 ` Richard Henderson
2022-07-03 21:28 ` [PATCH v2 11/11] docs/system: openrisc: Add OpenRISC documentation Stafford Horne
2022-07-04 10:25 ` Richard Henderson
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