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Thu, 7 Jul 2022 03:26:48 -0400 (EDT) Date: Thu, 7 Jul 2022 00:26:47 -0700 From: Peter Delevoryas To: Peter Delevoryas Cc: peter@pjd.dev, peter.maydell@linaro.org, andrew@aj.id.au, joel@jms.id.au, qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: Re: [PATCH 0/2] hw/gpio/aspeed: Don't let guests modify input pins Message-ID: References: <20220707071731.34047-1-peter@pjd.dev> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20220707071731.34047-1-peter@pjd.dev> Received-SPF: pass client-ip=64.147.123.27; envelope-from=peter@pjd.dev; helo=wnew2-smtp.messagingengine.com X-Spam_score_int: -17 X-Spam_score: -1.8 X-Spam_bar: - X-Spam_report: (-1.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FROM_FMBLA_NEWDOM14=0.998, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Thu, Jul 07, 2022 at 12:17:29AM -0700, Peter Delevoryas wrote: > The fby35 OpenBMC sysvinit scripts check various GPIO pins at start and > decide where to start IPMB daemons for each slot in the sled (4 slots max). > It only starts an IPMB daemon if the slot GPIO pins indicate that it's > present and powered on. > > I've been simulating some input pins by setting their value in the machine > reset function. I think a proper solution would be to add input pins to the > Aspeed GPIO code and create devices that force the pins high or low > appropriately, but for now setting the QOM property seemed fine. > > But, I noticed that while the values were set initially, something in the > boot process resets all the values I set to "low". I imagine something in > userspace or the driver is blanket writing zero to the data registers. I > think the Aspeed GPIO controller probably shouldn't be changing the value of > input pins in this case. > > To fix this, we could just make sure that aspeed_gpio_update() never sets > the value of an input pin. However, that would also prevent my code in > fby35_reset from initializing the input pins to some special value. So, to > support the QOM property setup use-case, I added a "force" parameter. Kinda > hacky, but it was the simplest thing I could think of. > > Thanks, > Peter My gitconfig was messed up, I was using the maintainers.pl script in my send-email.ccCmd, but that doesn't work for the cover letter. So, it just sent the cover letter to me. I didn't notice it in test emailing cause I usually just test sending to myself. Sorry about this. Hopefully I should finally have my email configuration fixed at this point...I hope. Peter > > Peter Delevoryas (2): > hw/gpio/aspeed: Don't let guests modify input pins > aspeed: Add fby35-bmc slot GPIO's > > hw/arm/aspeed.c | 14 +++++++++++++- > hw/gpio/aspeed_gpio.c | 22 ++++++++++++---------- > 2 files changed, 25 insertions(+), 11 deletions(-) > > -- > 2.36.1 >