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CTRY:US; LANG:en; SCL:1; SRV:; IPV:NLI; SFV:NSPM; H:mail.nvidia.com; PTR:dc6edge2.nvidia.com; CAT:NONE; SFS:(13230040)(36860700013)(1800799024)(82310400026)(7416014)(376014); DIR:OUT; SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Mar 2025 19:34:14.0266 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 25a66fa2-f677-4c4f-0ad2-08dd6bd40674 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a; Ip=[216.228.117.161]; Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF0001AB55.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB4122 Received-SPF: permerror client-ip=2a01:111:f403:2417::602; envelope-from=nicolinc@nvidia.com; helo=NAM12-DM6-obe.outbound.protection.outlook.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Tue, Mar 25, 2025 at 07:08:29PM +0100, Eric Auger wrote: > > +static int > > +smmuv3_accel_dev_install_nested_ste(SMMUv3AccelDevice *accel_dev, > > + uint32_t data_type, uint32_t data_len, > > + void *data) > > +{ > > + SMMUViommu *viommu = accel_dev->viommu; > > + SMMUS1Hwpt *s1_hwpt = accel_dev->s1_hwpt; > > + HostIOMMUDeviceIOMMUFD *idev = accel_dev->idev; > > + > > + if (!idev || !viommu) { > > + return -ENOENT; > > + } > > + > > + if (s1_hwpt) { > > + smmuv3_accel_dev_uninstall_nested_ste(accel_dev, false); > why do you choose abort = false? There is no particular reason. This is in the way where guest is updating the STE. So we want to stage the device somewhere as its default stage. Maybe ABORT could be a better place? I didn't give this a deeper thought, to be honest. Good question :) > > + ret = smmu_find_ste(sdev->smmu, sid, &ste, &event); > > + if (ret) { > > + /* > > + * For a 2-level Stream Table, the level-2 table might not be ready > > + * until the device gets inserted to the stream table. Ignore this. > > + */ > I am confused by the above comment. Please can you describe the > circumstances when this happens and why this should be an error I added this since one of the early versions, and I don't recall what was going on exactly... likely I saw smmu_find_ste() return an error at that time when guest OS boots with Stream Table init, yet later it installed the stage-1 STE and then smmu_find_ste() started to return STE. I think we can drop this comments, until we hit this again. > > + return; > > + } > > + > > + config = STE_CONFIG(&ste); > > + if (!STE_VALID(&ste) || !STE_CFG_S1_ENABLED(config)) { > you fully bypass the logic of smmuv3_get_config/decode_config. Couldn't > you reuse it. Originally we used the s1ctxptr and disabled/bypassed info. We likely can, though we don't need the CD part in decode_config so we might need to split those functions to reuse. Thanks Nicolin