From: Nicolin Chen <nicolinc@nvidia.com>
To: Shameerali Kolothum Thodi <shameerali.kolothum.thodi@huawei.com>
Cc: "eric.auger@redhat.com" <eric.auger@redhat.com>,
"qemu-arm@nongnu.org" <qemu-arm@nongnu.org>,
"qemu-devel@nongnu.org" <qemu-devel@nongnu.org>,
"peter.maydell@linaro.org" <peter.maydell@linaro.org>,
"jgg@nvidia.com" <jgg@nvidia.com>,
"ddutile@redhat.com" <ddutile@redhat.com>,
Linuxarm <linuxarm@huawei.com>,
"Wangzhou (B)" <wangzhou1@hisilicon.com>,
jiangkunkun <jiangkunkun@huawei.com>,
Jonathan Cameron <jonathan.cameron@huawei.com>,
"zhangfei.gao@linaro.org" <zhangfei.gao@linaro.org>
Subject: Re: [RFC PATCH 4/5] hw/arm/virt-acpi-build: Build IORT with multiple SMMU nodes
Date: Tue, 10 Dec 2024 12:48:28 -0800 [thread overview]
Message-ID: <Z1ipHKP4L/++143Q@Asurada-Nvidia> (raw)
In-Reply-To: <c14feb2934a0478180635bbdb27d5e53@huawei.com>
On Thu, Nov 21, 2024 at 09:46:16AM +0000, Shameerali Kolothum Thodi wrote:
> Hi Eric,
>
> > -----Original Message-----
> > From: Shameerali Kolothum Thodi
> > Sent: Wednesday, November 20, 2024 4:26 PM
> > To: 'eric.auger@redhat.com' <eric.auger@redhat.com>; qemu-
> > arm@nongnu.org; qemu-devel@nongnu.org
> > Cc: peter.maydell@linaro.org; jgg@nvidia.com; nicolinc@nvidia.com;
> > ddutile@redhat.com; Linuxarm <linuxarm@huawei.com>; Wangzhou (B)
> > <wangzhou1@hisilicon.com>; jiangkunkun <jiangkunkun@huawei.com>;
> > Jonathan Cameron <jonathan.cameron@huawei.com>;
> > zhangfei.gao@linaro.org
> > Subject: RE: [RFC PATCH 4/5] hw/arm/virt-acpi-build: Build IORT with
> > multiple SMMU nodes
> >
> > > > I think I have an idea why the hot add was not working.
> > > >
> > > > When we have the PCIe topology as something like below,
> > > >
> > > > -device pxb-pcie,id=pcie.1,bus_nr=8,bus=pcie.0 \ -device
> > > > pcie-root-port,id=pcie.port1,bus=pcie.1,chassis=1 \ -device
> > > > pcie-root-port,id=pcie.port2,bus=pcie.1,chassis=2 \ -device
> > > > arm-smmuv3-nested,id=smmuv1,pci-bus=pcie.1 \ ...
> > > >
> > > > The current IORT generation includes the pcie-root-port dev ids also
> > > > in the SMMUv3 node idmaps.
> > > >
> > > > Hence, when Guest kernel loads, pcieport is also behind the SMMUv3.
> > > >
> > > > [ 1.466670] pcieport 0000:64:00.0: Adding to iommu group 1
> > > > ...
> > > > [ 1.448205] pcieport 0000:64:01.0: Adding to iommu group 2
> > >
> > > But it should be the same without multi-instantiation, no? I would
> > > have expected this as normal. Has you tested hot-plug without the
> > > series laterly? Do you have the same pb?
> >
> > That is a good question. I will give it a try soon and update.
>
> I tried hot add with the current SMMUv3(iommu=smmuv3) and hot add
> works when I added a virtio dev to pcie-root-port connected to a pxb-pcie.
>
> And now I think I know(hopefully) the reason why it is not working with
> smmuv3-nested case. I think the root cause is this commit here,
>
> (series: " cover-letter: Add HW accelerated nesting support for arm SMMUv3")
> This changes the way address space is returned for the devices.
>
> static AddressSpace *smmu_find_add_as(PCIBus *bus, void *opaque, int devfn)
> {
> SMMUState *s = opaque;
> SMMUPciBus *sbus = smmu_get_sbus(s, bus);
> SMMUDevice *sdev = smmu_get_sdev(s, sbus, bus, devfn);
>
> /* Return the system as if the device uses stage-2 only */
> if (s->nested && !sdev->s1_hwpt) {
> return &sdev->as_sysmem;
> } else {
> return &sdev->as;
> }
> }
>
> If we have entries in the SMMUv3 idmap for bus:devfn, then I think we should
> return IOMMU address space here. But the logic above returns sysmem
> address space for anything other than vfio/iommufd devices.
>
> The hot add works when I hacked the logic to return IOMMU address space
> for pcie root port devices.
That is to bypass the "if (memory_region_is_iommu(section->mr))"
in vfio_listener_region_add(), when the device gets initially
attached to the default container.
Once a device reaches to the pci_device_set_iommu_device() call,
it should be attached to an IDENTIY/bypass proxy s1_hwpt, so the
smmu_find_add_as() will return the iommu as.
So, the fact that your hack is working means the hotplug routine
is likely missing a pci_device_set_iommu_device() call, IMHO, or
probably it should do pci_device_iommu_address_space() after the
device finishes pci_device_set_iommu_device() instead..
Nicolin
next prev parent reply other threads:[~2024-12-10 20:49 UTC|newest]
Thread overview: 150+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-08 12:52 [RFC PATCH 0/5] hw/arm/virt: Add support for user-creatable nested SMMUv3 Shameer Kolothum via
2024-11-08 12:52 ` [RFC PATCH 1/5] hw/arm/virt: Add an SMMU_IO_LEN macro Shameer Kolothum via
2024-11-13 16:48 ` Eric Auger
2024-11-08 12:52 ` [RFC PATCH 2/5] hw/arm/smmuv3: Add initial support for SMMUv3 Nested device Shameer Kolothum via
2024-11-13 17:12 ` Eric Auger
2024-11-13 18:05 ` Nicolin Chen
2024-11-26 18:28 ` Donald Dutile
2024-11-27 10:21 ` Shameerali Kolothum Thodi via
2024-11-27 16:00 ` Jason Gunthorpe
2024-11-27 16:05 ` Eric Auger
2024-11-28 3:25 ` Zhangfei Gao
2024-11-28 8:06 ` Eric Auger
2024-11-28 8:28 ` Shameerali Kolothum Thodi via
2024-11-28 8:41 ` Eric Auger
2024-11-28 12:52 ` Jason Gunthorpe
2024-11-27 23:03 ` Donald Dutile
2024-11-28 12:51 ` Jason Gunthorpe
2024-11-28 4:29 ` Donald Dutile
2024-11-28 4:44 ` Nicolin Chen
2024-11-28 12:54 ` Jason Gunthorpe
2024-11-28 18:22 ` Nicolin Chen
2024-12-02 18:53 ` Donald Dutile
2024-11-28 8:17 ` Shameerali Kolothum Thodi via
2024-11-14 8:20 ` Shameerali Kolothum Thodi via
2024-11-14 8:41 ` Eric Auger
2024-11-14 13:27 ` Shameerali Kolothum Thodi via
2024-11-15 22:32 ` Nicolin Chen
2024-11-13 18:00 ` Eric Auger
2024-11-08 12:52 ` [RFC PATCH 3/5] hw/arm/smmuv3: Associate a pci bus with a " Shameer Kolothum via
2024-11-13 17:58 ` Eric Auger
2024-11-14 8:30 ` Shameerali Kolothum Thodi via
2025-01-30 16:29 ` Daniel P. Berrangé
2025-01-30 18:19 ` Shameerali Kolothum Thodi via
2024-11-08 12:52 ` [RFC PATCH 4/5] hw/arm/virt-acpi-build: Build IORT with multiple SMMU nodes Shameer Kolothum via
2024-11-18 10:01 ` Eric Auger
2024-11-18 11:44 ` Shameerali Kolothum Thodi via
2024-11-18 13:45 ` Eric Auger
2024-11-18 15:00 ` Shameerali Kolothum Thodi via
2024-11-18 18:09 ` Eric Auger
2024-11-20 14:16 ` Shameerali Kolothum Thodi via
2024-11-20 16:10 ` Eric Auger
2024-11-20 16:26 ` Shameerali Kolothum Thodi via
2024-11-21 9:46 ` Shameerali Kolothum Thodi via
2024-12-10 20:48 ` Nicolin Chen [this message]
2024-12-11 15:21 ` Shameerali Kolothum Thodi via
2024-12-13 0:28 ` Nicolin Chen
2024-11-08 12:52 ` [RFC PATCH 5/5] hw/arm/virt-acpi-build: Add IORT RMR regions to handle MSI nested binding Shameer Kolothum via
2024-11-13 18:31 ` Nicolin Chen
2024-11-14 8:48 ` Shameerali Kolothum Thodi via
2024-11-14 10:41 ` Eric Auger
2024-11-15 22:12 ` Nicolin Chen
2024-12-10 23:01 ` Nicolin Chen
2024-12-11 0:48 ` Jason Gunthorpe
2024-12-11 1:28 ` Nicolin Chen
2024-12-11 13:11 ` Jason Gunthorpe
2024-12-11 17:20 ` Nicolin Chen
2024-12-11 18:01 ` Jason Gunthorpe
2024-11-12 22:59 ` [RFC PATCH 0/5] hw/arm/virt: Add support for user-creatable nested SMMUv3 Nicolin Chen
2024-11-14 7:56 ` Shameerali Kolothum Thodi via
2024-11-20 23:59 ` Nathan Chen
2024-11-21 10:12 ` Shameerali Kolothum Thodi via
2024-11-22 1:41 ` Nathan Chen
2024-11-22 17:38 ` Shameerali Kolothum Thodi via
2024-11-22 18:53 ` Nathan Chen
2025-02-04 14:00 ` Eric Auger
2024-12-13 11:58 ` Daniel P. Berrangé
2024-12-13 12:43 ` Jason Gunthorpe
2024-12-12 23:54 ` Nathan Chen
2024-12-13 1:01 ` Nathan Chen
2024-12-16 9:31 ` Shameerali Kolothum Thodi via
2025-01-25 2:43 ` Nathan Chen
2025-01-27 15:26 ` Shameerali Kolothum Thodi via
2025-01-27 23:35 ` Nathan Chen
2024-11-13 16:16 ` Mostafa Saleh
2024-11-14 8:01 ` Shameerali Kolothum Thodi via
2024-11-14 11:49 ` Mostafa Saleh
2024-11-13 21:42 ` Nicolin Chen
2024-11-14 9:11 ` Shameerali Kolothum Thodi via
2024-11-18 10:50 ` Eric Auger
2025-01-30 16:41 ` Daniel P. Berrangé
2024-12-13 12:00 ` Daniel P. Berrangé
2024-12-13 12:46 ` Jason Gunthorpe
2024-12-13 13:19 ` Daniel P. Berrangé
2024-12-16 9:38 ` Shameerali Kolothum Thodi via
2024-12-17 18:36 ` Donald Dutile
2024-12-13 13:33 ` Peter Maydell
2024-12-16 10:01 ` Shameerali Kolothum Thodi via
2025-01-09 4:45 ` Nicolin Chen
2025-01-11 4:05 ` Donald Dutile
2025-01-23 4:10 ` Nicolin Chen
2025-01-23 8:28 ` Shameerali Kolothum Thodi via
2025-01-23 8:40 ` Nicolin Chen
2025-01-23 11:07 ` Duan, Zhenzhong
2025-02-17 9:17 ` Duan, Zhenzhong
2025-02-18 6:52 ` Shameerali Kolothum Thodi via
2025-03-06 17:59 ` Eric Auger
2025-03-06 18:27 ` Shameerali Kolothum Thodi via
2025-03-06 18:40 ` Eric Auger
2025-01-31 16:54 ` Eric Auger
2025-02-03 18:50 ` Nicolin Chen
2025-02-04 17:49 ` Eric Auger
2025-02-05 0:08 ` Nicolin Chen
2025-02-05 10:43 ` Shameerali Kolothum Thodi via
2025-02-05 12:35 ` Eric Auger
2025-02-06 10:34 ` Shameerali Kolothum Thodi via
2025-02-06 18:58 ` Nicolin Chen
2025-03-03 15:21 ` Shameerali Kolothum Thodi via
2025-03-03 17:04 ` Nicolin Chen
2025-03-04 9:30 ` Shameerali Kolothum Thodi via
2025-01-30 16:00 ` Daniel P. Berrangé
2025-01-30 18:09 ` Shameerali Kolothum Thodi via
2025-01-31 9:33 ` Shameerali Kolothum Thodi via
2025-01-31 10:07 ` Eric Auger
2025-01-31 14:24 ` Jason Gunthorpe
2025-01-31 14:39 ` Shameerali Kolothum Thodi via
2025-01-31 14:54 ` Jason Gunthorpe
2025-01-31 15:23 ` Shameerali Kolothum Thodi via
2025-01-31 16:08 ` Eric Auger
2025-02-05 20:53 ` Nathan Chen
2025-02-06 8:54 ` Daniel P. Berrangé
2025-02-06 8:53 ` Daniel P. Berrangé
2025-02-06 16:44 ` Eric Auger
2025-01-31 21:41 ` Daniel P. Berrangé
2025-02-06 10:02 ` Shameerali Kolothum Thodi via
2025-02-06 10:37 ` Daniel P. Berrangé
2025-02-06 13:51 ` Shameerali Kolothum Thodi via
2025-02-06 14:46 ` Daniel P. Berrangé
2025-02-06 15:07 ` Shameerali Kolothum Thodi via
2025-02-06 17:02 ` Jason Gunthorpe
2025-02-06 17:10 ` Daniel P. Berrangé
2025-02-06 17:46 ` Jason Gunthorpe
2025-02-06 17:54 ` Daniel P. Berrangé
2025-02-06 17:58 ` Jason Gunthorpe
2025-02-06 18:04 ` Shameerali Kolothum Thodi via
2025-02-06 18:13 ` Jason Gunthorpe
2025-02-06 18:18 ` Shameerali Kolothum Thodi via
2025-02-06 18:22 ` Jason Gunthorpe
2025-02-06 20:33 ` Nicolin Chen
2025-02-06 20:38 ` Jason Gunthorpe
2025-02-06 20:48 ` Nicolin Chen
2025-02-06 21:11 ` Jason Gunthorpe
2025-02-06 22:46 ` Nicolin Chen
2025-02-07 0:08 ` Jason Gunthorpe
2025-02-07 10:21 ` Shameerali Kolothum Thodi via
2025-02-07 10:31 ` Daniel P. Berrangé
2025-02-07 12:21 ` Shameerali Kolothum Thodi via
2025-02-07 12:53 ` Jason Gunthorpe
2025-02-06 18:18 ` Daniel P. Berrangé
2025-02-06 17:57 ` Shameerali Kolothum Thodi via
2025-02-06 17:59 ` Jason Gunthorpe
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=Z1ipHKP4L/++143Q@Asurada-Nvidia \
--to=nicolinc@nvidia.com \
--cc=ddutile@redhat.com \
--cc=eric.auger@redhat.com \
--cc=jgg@nvidia.com \
--cc=jiangkunkun@huawei.com \
--cc=jonathan.cameron@huawei.com \
--cc=linuxarm@huawei.com \
--cc=peter.maydell@linaro.org \
--cc=qemu-arm@nongnu.org \
--cc=qemu-devel@nongnu.org \
--cc=shameerali.kolothum.thodi@huawei.com \
--cc=wangzhou1@hisilicon.com \
--cc=zhangfei.gao@linaro.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).