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Mon, 16 Dec 2024 17:53:41 -0800 (PST) Date: Mon, 16 Dec 2024 17:53:40 -0800 In-Reply-To: <269199260a42ff716f588fbac9c5c2c2038339c4.camel@intel.com> Mime-Version: 1.0 References: <43b26df1-4c27-41ff-a482-e258f872cc31@intel.com> <269199260a42ff716f588fbac9c5c2c2038339c4.camel@intel.com> Message-ID: Subject: Re: (Proposal) New TDX Global Metadata To Report FIXED0 and FIXED1 CPUID Bits From: Sean Christopherson To: Rick P Edgecombe Cc: Xiaoyao Li , "pbonzini@redhat.com" , Kai Huang , "binbin.wu@linux.intel.com" , Reinette Chatre , Yan Y Zhao , "tony.lindgren@linux.intel.com" , "kvm@vger.kernel.org" , Adrian Hunter , Isaku Yamahata , "qemu-devel@nongnu.org" Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass client-ip=2607:f8b0:4864:20::64a; envelope-from=3pdlgZwYKCh4M84HD6AIIAF8.6IGK8GO-78P8FHIHAHO.ILA@flex--seanjc.bounces.google.com; helo=mail-pl1-x64a.google.com X-Spam_score_int: -95 X-Spam_score: -9.6 X-Spam_bar: --------- X-Spam_report: (-9.6 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_MED=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, USER_IN_DEF_DKIM_WL=-7.5 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Tue, Dec 10, 2024, Rick P Edgecombe wrote: > On Tue, 2024-12-10 at 11:22 +0800, Xiaoyao Li wrote: > > > The solution in this proposal decreases the work the VMM has to do, b= ut > > > in the long term won't remove hand coding completely. As long as we a= re > > > designing something, what kind of bar should we target? > >=20 > > For this specific #VE reduction case, I think userspace doesn't need to= =20 > > do any hand coding. Userspace just treats the bits related to #VE=20 > > reduction as configurable as reported by TDX module/KVM. And userspace= =20 > > doesn't care if the value seen by TD guest is matched with what gets=20 > > configured by it because they are out of control of userspace. > > Besides a specific problem, here reduced #VE is also an example of increa= sing > complexity for TD CPUID. If we have more things like it, it could make th= is > interface too rigid. I agree with Rick in that having QEMU treat them as configurable is going t= o be a disaster. But I don't think it's actually problematic in practice. If QEMU (or KVM) has no visibility into the state of the guest's view of th= e affected features, then it doesn't matter whether they are fixed or configu= rable. They're effectively Schr=C3=B6dinger's bits: until QEMU/KVM actually looks = at them, they're neither dead nor alive, and since QEMU/KVM *can't* look at them, wh= o cares? So, if the TDX Module *requires* them to be set/cleared when the TD is crea= ted, then they should be reported as fixed. If the TDX module doesn't care, the= n they should be reported as configurable. The fact that the guest can muck with = things under the hood doesn't factor into that logic. If TDX pulls something like this for features that KVM cares about, then we= have problems, but that's already true today. If a feature requires KVM support= , it doesn't really matter if the feature is fixed or configurable. What matter= s is that KVM has a chance to enforce that the feature can be used by the guest = if and only if KVM has the proper support in place. Because if KVM is complet= ely unaware of a feature, it's impossible for KVM to know that the feature need= s to be rejected. This isn't unique to TDX, CoCo, or firmware. Every new feature that lands = in hardware needs to either be "benign" or have the appropriate virtualization controls. KVM already has to deal with cases where features can effectivel= y be used without KVM's knowledge. E.g. there are plenty of instruction-level virtualization holes, and SEV-ES doubled down by essentially forcing KVM to= let the guest write XCR0 and XSS directly. It all works, so long as the hardware vendor doesn't screw up and let the g= uest use a feature that impacts host safety and/or functionality, without the hy= pervisor's knowledge. So, just don't screw up :-)