From: Tao Su <tao1.su@linux.intel.com>
To: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
Cc: qemu-devel@nongnu.org, pbonzini@redhat.com, imammedo@redhat.com,
xiaoyao.li@intel.com, zhao1.liu@linux.intel.com,
xuelian.guo@intel.com
Subject: Re: [PATCH 1/4] target/i386: Introduce SierraForest-v2 model
Date: Wed, 22 Jan 2025 09:16:37 +0800 [thread overview]
Message-ID: <Z5BG9aEO3zSg6Fkg@linux.bj.intel.com> (raw)
In-Reply-To: <20250121173458.udetzrvr7mq6pjce@desk>
On Tue, Jan 21, 2025 at 09:34:58AM -0800, Pawan Gupta wrote:
> On Tue, Jan 21, 2025 at 10:06:47AM +0800, Tao Su wrote:
> > Update SierraForest CPU model to add LAM, 4 bits indicating certain bits
> > of IA32_SPEC_CTR are supported(intel-psfd, ipred-ctrl, rrsba-ctrl,
> > bhi-ctrl) and the missing features(ss, tsc-adjust, cldemote, movdiri,
> > movdir64b)
> >
> > Also add GDS-NO and RFDS-NO to indicate the related vulnerabilities are
> > mitigated in stepping 3.
>
> Does this only apply to stepping 3? I don't think Sierra Forest was ever
> vulnerable to GDS and RFDS [1].
>
On the real machine, stepping 0 does not set GDS_NO and RFDS_NO, but
stepping 3 does.
> There are many other vulnerabilities that Sierra Forest is not vulnerable to,
> is it really necessary to add the *_NO bits to CPU definitions?
>
> [1] https://www.intel.com/content/www/us/en/developer/topic-technology/software-security-guidance/processors-affected-consolidated-product-cpu-model.html
*_NO bits indicate processor is not affected by *, so adding these to the
CPU model will prevent the guest OS (using the CPU model) from trying to
use related software mitigation, which I think is reasonable.
next prev parent reply other threads:[~2025-01-22 1:22 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-21 2:06 [PATCH 0/4] Introduce SierraForest-v2 and ClearwaterForest CPU model Tao Su
2025-01-21 2:06 ` [PATCH 1/4] target/i386: Introduce SierraForest-v2 model Tao Su
2025-01-21 12:40 ` Zhao Liu
2025-01-21 17:34 ` Pawan Gupta
2025-01-22 1:16 ` Tao Su [this message]
2025-01-22 4:32 ` Pawan Gupta
2025-01-22 1:44 ` Xiaoyao Li
2025-01-21 2:06 ` [PATCH 2/4] target/i386: Export BHI_NO bit to guests Tao Su
2025-01-21 12:41 ` Zhao Liu
2025-01-21 17:38 ` Pawan Gupta
2025-01-22 1:44 ` Xiaoyao Li
2025-01-21 2:06 ` [PATCH 3/4] target/i386: Add new CPU model ClearwaterForest Tao Su
2025-01-21 13:20 ` Zhao Liu
2025-01-22 1:44 ` Xiaoyao Li
2025-01-21 2:06 ` [PATCH 4/4] docs: Add GNR, SRF and CWF CPU models Tao Su
2025-01-21 3:12 ` BALATON Zoltan
2025-01-21 3:18 ` Tao Su
2025-01-21 13:31 ` Zhao Liu
2025-01-22 1:21 ` Tao Su
2025-01-21 13:38 ` [PATCH 0/4] Introduce SierraForest-v2 and ClearwaterForest CPU model Paolo Bonzini
2025-01-22 1:21 ` Tao Su
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