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From: Zhao Liu <zhao1.liu@intel.com>
To: Paolo Bonzini <pbonzini@redhat.com>
Cc: "Manos Pitsidianakis" <manos.pitsidianakis@linaro.org>,
	"Junjie Mao" <junjie.mao@hotmail.com>,
	"Alex Bennée" <alex.bennee@linaro.org>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Peter Maydell" <peter.maydell@linaro.org>,
	"Daniel P . Berrangé" <berrange@redhat.com>,
	qemu-devel <qemu-devel@nongnu.org>,
	qemu-rust@nongnu.org
Subject: Re: [PATCH 09/10] rust/timer/hpet: add qom and qdev APIs support
Date: Sun, 9 Feb 2025 02:06:35 +0800	[thread overview]
Message-ID: <Z6edKxYFzA6suDlj@intel.com> (raw)
In-Reply-To: <CABgObfaBLdQOf0RGbnmxYJ5qYM0Q95z-8Nx6Amwzvu-88e56zQ@mail.gmail.com>

> > > This needs to be "match addr & !4".
> >
> > I understand it's not necessary:
> >
> > In timer_and_addr(), I've masked the address with 0x18.
> >
> >     fn timer_and_addr(&self, addr: hwaddr) ->
> > Option<(&BqlRefCell<HPETTimer>, hwaddr)> {
> >         let timer_id: usize = ((addr - 0x100) / 0x20) as usize;
> >
> >         if timer_id > self.num_timers.get() {
> >             None
> >         } else {
> >             Some((&self.timers[timer_id], addr & 0x18))
> >
> 
> Ah, this should be 0x1C (or perhaps 0x1F). Otherwise there is a bug in
> accessing the high 32 bits of a 64-bit register; shift will always be 0 in
> HPETTimer::read and write.

Yes, you're right. Then we should use 0x1F so that invalid access could
detected (or loged in future) and ignored.

Based on the similar reason, C side also need to use "addr & (0x1f | ~4)"
instead of 0x18 to catch invalid access. If I'm right, I can submit a
fix.

Thanks,
Zhao



  reply	other threads:[~2025-02-08 17:48 UTC|newest]

Thread overview: 34+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-25 12:51 [PATCH 00/10] rust: Add HPET timer device Zhao Liu
2025-01-25 12:51 ` [PATCH 01/10] i386/fw_cfg: move hpet_cfg definition to hpet.c Zhao Liu
2025-01-25 12:51 ` [PATCH 02/10] rust/qdev: add the macro to define bit property Zhao Liu
2025-01-25 12:51 ` [PATCH 03/10] rust/irq: Add a helper to convert [InterruptSource] to [*mut IRQState] Zhao Liu
2025-01-29 10:51   ` Paolo Bonzini
2025-02-07  7:10     ` Zhao Liu
2025-02-07  7:44       ` Zhao Liu
2025-02-07  9:57         ` Paolo Bonzini
2025-02-08 11:14           ` Zhao Liu
2025-02-08 11:39             ` Paolo Bonzini
2025-02-08 18:10               ` Zhao Liu
2025-01-25 12:51 ` [PATCH 04/10] rust: add bindings for gpio_{in|out} initialization Zhao Liu
2025-01-29 10:59   ` Paolo Bonzini
2025-02-07  8:43     ` Zhao Liu
2025-02-07  9:54       ` Paolo Bonzini
2025-02-08 11:16         ` Zhao Liu
2025-01-25 12:51 ` [PATCH 05/10] rust: add bindings for memattrs Zhao Liu
2025-01-25 12:51 ` [PATCH 06/10] rust: add bindings for timer Zhao Liu
2025-01-29 10:58   ` Paolo Bonzini
2025-02-07 13:33     ` Zhao Liu
2025-02-07 14:55       ` Paolo Bonzini
2025-02-08 11:08         ` Zhao Liu
2025-01-25 12:51 ` [PATCH 07/10] rust/timer/hpet: define hpet_cfg Zhao Liu
2025-01-29 10:58   ` Paolo Bonzini
2025-02-07 14:30     ` Zhao Liu
2025-01-25 12:51 ` [PATCH 08/10] rust/timer/hpet: add basic HPET timer and HPETState Zhao Liu
2025-01-29 10:57   ` Paolo Bonzini
2025-02-08  8:19     ` Zhao Liu
2025-01-25 12:51 ` [PATCH 09/10] rust/timer/hpet: add qom and qdev APIs support Zhao Liu
2025-01-29 10:58   ` Paolo Bonzini
2025-02-08 10:55     ` Zhao Liu
2025-02-08 11:41       ` Paolo Bonzini
2025-02-08 18:06         ` Zhao Liu [this message]
2025-01-25 12:51 ` [PATCH 10/10] i386: enable rust hpet for pc when rust is enabled Zhao Liu

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