qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Stafford Horne <shorne@gmail.com>
To: Richard Henderson <richard.henderson@linaro.org>
Cc: QEMU Development <qemu-devel@nongnu.org>,
	Linux OpenRISC <linux-openrisc@vger.kernel.org>
Subject: Re: [PATCH v2 3/3] target/openrisc: Setup FPU for detecting tininess before rounding
Date: Thu, 11 May 2023 15:33:04 +0100	[thread overview]
Message-ID: <ZFz8oJ+hYdsoZeoi@antec> (raw)
In-Reply-To: <390d7ef2-1240-55a3-4b13-ab8796921b7a@linaro.org>

On Wed, May 10, 2023 at 05:16:20PM +0100, Richard Henderson wrote:
> On 5/10/23 16:32, Stafford Horne wrote:
> > OpenRISC defines tininess to be detected before rounding.  Setup qemu to
> > obey this.
> > 
> > Signed-off-by: Stafford Horne <shorne@gmail.com>
> > ---
> > Since v1:
> >   - Remove setting default NaN behavior.  I discussed with the FPU developers and
> >     they mentioned the OpenRISC hardware should be IEEE compliant when handling
> >     and forwarding NaN payloads, and they don't want try change this.
> 
> There is no such thing as IEEE compliant for NaN payloads.
> All of that is implementation defined.

I see, I haven't yet seen to IEEE 754 spec so I don't know how much is covered.
It was incorrect to assume forwarding semantics was covered.

> All OpenRISC needs to do is document its intentions (and then double-check
> that fpu/softfloat-specialize.c.inc does what is documented).

Understood, that makes sense, also reading that code I see how all other
architectures are able to ifdef their way to a specific behavior.  I will see
what our current implementions do and update the spec and qemu as a separate
task.

> 
> Anyway, back to this patch,
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
> 
> :-)

Thank you ^_^

-Stafford


      reply	other threads:[~2023-05-11 14:33 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-05-10 15:32 [PATCH v2 0/3] OpenRISC updates for user space FPU Stafford Horne
2023-05-10 15:32 ` [PATCH v2 1/3] target/openrisc: Allow fpcsr access in user mode Stafford Horne
2023-05-10 16:13   ` Richard Henderson
2023-05-11 14:25     ` Stafford Horne
2023-05-10 15:32 ` [PATCH v2 2/3] target/openrisc: Set PC to cpu state on FPU exception Stafford Horne
2023-05-10 16:13   ` Richard Henderson
2023-05-10 15:32 ` [PATCH v2 3/3] target/openrisc: Setup FPU for detecting tininess before rounding Stafford Horne
2023-05-10 16:16   ` Richard Henderson
2023-05-11 14:33     ` Stafford Horne [this message]

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=ZFz8oJ+hYdsoZeoi@antec \
    --to=shorne@gmail.com \
    --cc=linux-openrisc@vger.kernel.org \
    --cc=qemu-devel@nongnu.org \
    --cc=richard.henderson@linaro.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).