From: Mostafa Saleh <smostafa@google.com>
To: Eric Auger <eric.auger@redhat.com>
Cc: qemu-devel@nongnu.org, jean-philippe@linaro.org,
peter.maydell@linaro.org, qemu-arm@nongnu.org,
richard.henderson@linaro.org
Subject: Re: [RFC PATCH v3 08/10] hw/arm/smmuv3: Add CMDs related to stage-2
Date: Mon, 15 May 2023 15:32:06 +0000 [thread overview]
Message-ID: <ZGJQdp5nVVEGlOzt@google.com> (raw)
In-Reply-To: <ee890a2b-946e-1a04-4f00-b7c60b31af76@redhat.com>
Hi Eric,
On Mon, May 15, 2023 at 04:14:16PM +0200, Eric Auger wrote:
> Hi Mostafa,
> On 4/1/23 12:49, Mostafa Saleh wrote:
> > CMD_TLBI_S2_IPA: As S1+S2 is not enabled, for now this can be the
> > same as CMD_TLBI_NH_VAA.
> >
> > CMD_TLBI_S12_VMALL: Added new function to invalidate TLB by VMID.
> >
> > For stage-1 only commands, add a check to throw CERROR_ILL if used
> > when stage-1 is not supported.
> >
> > Signed-off-by: Mostafa Saleh <smostafa@google.com>
> > ---
> > Changes in v3:
> > - Log guest error for all illegal commands.
> > Changes in v2:
> > - Add checks for stage-1 only commands
> > - Rename smmuv3_s1_range_inval to smmuv3_range_inval
> > ---
> > hw/arm/smmu-common.c | 16 +++++++++++
> > hw/arm/smmuv3.c | 53 ++++++++++++++++++++++++++++++------
> > hw/arm/trace-events | 4 ++-
> > include/hw/arm/smmu-common.h | 1 +
> > 4 files changed, 65 insertions(+), 9 deletions(-)
> >
> > diff --git a/hw/arm/smmu-common.c b/hw/arm/smmu-common.c
> > index 72ed6edd48..45e9d7e752 100644
> > --- a/hw/arm/smmu-common.c
> > +++ b/hw/arm/smmu-common.c
> > @@ -135,6 +135,16 @@ static gboolean smmu_hash_remove_by_asid(gpointer key, gpointer value,
> >
> > return SMMU_IOTLB_ASID(*iotlb_key) == asid;
> > }
> > +
> > +static gboolean smmu_hash_remove_by_vmid(gpointer key, gpointer value,
> > + gpointer user_data)
> > +{
> > + uint16_t vmid = *(uint16_t *)user_data;
> > + SMMUIOTLBKey *iotlb_key = (SMMUIOTLBKey *)key;
> > +
> > + return SMMU_IOTLB_VMID(*iotlb_key) == vmid;
> > +}
> > +
> > static gboolean smmu_hash_remove_by_asid_vmid_iova(gpointer key, gpointer value,
> > gpointer user_data)
> > {
> > @@ -187,6 +197,12 @@ void smmu_iotlb_inv_asid(SMMUState *s, uint16_t asid)
> > g_hash_table_foreach_remove(s->iotlb, smmu_hash_remove_by_asid, &asid);
> > }
> >
> > +inline void smmu_iotlb_inv_vmid(SMMUState *s, uint16_t vmid)
> > +{
> > + trace_smmu_iotlb_inv_vmid(vmid);
> > + g_hash_table_foreach_remove(s->iotlb, smmu_hash_remove_by_vmid, &vmid);
> > +}
> > +
> > /* VMSAv8-64 Translation */
> >
> > /**
> > diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
> > index d7e7003da9..3b5b1fad1a 100644
> > --- a/hw/arm/smmuv3.c
> > +++ b/hw/arm/smmuv3.c
> > @@ -1069,7 +1069,7 @@ static void smmuv3_inv_notifiers_iova(SMMUState *s, int asid, dma_addr_t iova,
> > }
> > }
> >
> > -static void smmuv3_s1_range_inval(SMMUState *s, Cmd *cmd)
> > +static void smmuv3_range_inval(SMMUState *s, Cmd *cmd)
> > {
> > dma_addr_t end, addr = CMD_ADDR(cmd);
> > uint8_t type = CMD_TYPE(cmd);
> > @@ -1094,7 +1094,7 @@ static void smmuv3_s1_range_inval(SMMUState *s, Cmd *cmd)
> > }
> >
> > if (!tg) {
> > - trace_smmuv3_s1_range_inval(vmid, asid, addr, tg, 1, ttl, leaf);
> > + trace_smmuv3_range_inval(vmid, asid, addr, tg, 1, ttl, leaf);
> > smmuv3_inv_notifiers_iova(s, asid, addr, tg, 1);
> > smmu_iotlb_inv_iova(s, asid, vmid, addr, tg, 1, ttl);
> > return;
> > @@ -1112,7 +1112,7 @@ static void smmuv3_s1_range_inval(SMMUState *s, Cmd *cmd)
> > uint64_t mask = dma_aligned_pow2_mask(addr, end, 64);
> >
> > num_pages = (mask + 1) >> granule;
> > - trace_smmuv3_s1_range_inval(vmid, asid, addr, tg, num_pages, ttl, leaf);
> > + trace_smmuv3_range_inval(vmid, asid, addr, tg, num_pages, ttl, leaf);
> > smmuv3_inv_notifiers_iova(s, asid, addr, tg, num_pages);
> > smmu_iotlb_inv_iova(s, asid, vmid, addr, tg, num_pages, ttl);
> > addr += mask + 1;
> > @@ -1246,12 +1246,22 @@ static int smmuv3_cmdq_consume(SMMUv3State *s)
> > {
> > uint16_t asid = CMD_ASID(&cmd);
> >
> > + if (!STAGE1_SUPPORTED(s)) {
> > + cmd_error = SMMU_CERROR_ILL;
> > + break;
> > + }
> > +
> > trace_smmuv3_cmdq_tlbi_nh_asid(asid);
> > smmu_inv_notifiers_all(&s->smmu_state);
> > smmu_iotlb_inv_asid(bs, asid);
> > break;
> > }
> > case SMMU_CMD_TLBI_NH_ALL:
> > + if (!STAGE1_SUPPORTED(s)) {
> > + cmd_error = SMMU_CERROR_ILL;
> > + break;
> > + }
> > + QEMU_FALLTHROUGH;
> > case SMMU_CMD_TLBI_NSNH_ALL:
> > trace_smmuv3_cmdq_tlbi_nh();
> > smmu_inv_notifiers_all(&s->smmu_state);
> > @@ -1259,7 +1269,34 @@ static int smmuv3_cmdq_consume(SMMUv3State *s)
> > break;
> > case SMMU_CMD_TLBI_NH_VAA:
> > case SMMU_CMD_TLBI_NH_VA:
> > - smmuv3_s1_range_inval(bs, &cmd);
> > + if (!STAGE1_SUPPORTED(s)) {
> > + cmd_error = SMMU_CERROR_ILL;
> > + break;
> > + }
> > + smmuv3_range_inval(bs, &cmd);
> > + break;
> > + case SMMU_CMD_TLBI_S12_VMALL:
> > + uint16_t vmid = CMD_VMID(&cmd);
> I get
> ../hw/arm/smmuv3.c: In function ‘smmuv3_cmdq_consume’:
> ../hw/arm/smmuv3.c:1295:13: error: a label can only be part of a
> statement and a declaration is not a statement
> uint16_t vmid = CMD_VMID(&cmd);
>
> you should put the case into a block.
Thanks for spotting this, I will fix it.
Can you please let me know your config/build commands?
as I didn't get errors when compiling it.
Thanks,
Mostafa
next prev parent reply other threads:[~2023-05-15 15:32 UTC|newest]
Thread overview: 26+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-04-01 10:49 [RFC PATCH v3 00/10] Add stage-2 translation for SMMUv3 Mostafa Saleh
2023-04-01 10:49 ` [RFC PATCH v3 01/10] hw/arm/smmuv3: Add missing fields for IDR0 Mostafa Saleh
2023-04-01 10:49 ` [RFC PATCH v3 02/10] hw/arm/smmuv3: Update translation config to hold stage-2 Mostafa Saleh
2023-05-15 8:37 ` Eric Auger
2023-04-01 10:49 ` [RFC PATCH v3 03/10] hw/arm/smmuv3: Refactor stage-1 PTW Mostafa Saleh
2023-04-01 10:49 ` [RFC PATCH v3 04/10] hw/arm/smmuv3: Add page table walk for stage-2 Mostafa Saleh
2023-05-15 8:37 ` Eric Auger
2023-04-01 10:49 ` [RFC PATCH v3 05/10] hw/arm/smmuv3: Parse STE config " Mostafa Saleh
2023-05-15 13:03 ` Eric Auger
2023-05-15 15:37 ` Mostafa Saleh
2023-05-16 17:19 ` Eric Auger
2023-04-01 10:49 ` [RFC PATCH v3 06/10] hw/arm/smmuv3: Make TLB lookup work " Mostafa Saleh
2023-04-01 10:49 ` [RFC PATCH v3 07/10] hw/arm/smmuv3: Add VMID to TLB tagging Mostafa Saleh
2023-04-01 10:49 ` [RFC PATCH v3 08/10] hw/arm/smmuv3: Add CMDs related to stage-2 Mostafa Saleh
2023-05-15 13:17 ` Eric Auger
2023-05-15 14:14 ` Eric Auger
2023-05-15 15:32 ` Mostafa Saleh [this message]
2023-05-16 17:04 ` Eric Auger
2023-05-16 19:32 ` Mostafa Saleh
2023-04-01 10:49 ` [RFC PATCH v3 09/10] hw/arm/smmuv3: Add stage-2 support in iova notifier Mostafa Saleh
2023-04-01 10:49 ` [RFC PATCH v3 10/10] hw/arm/smmuv3: Add knob to choose translation stage and enable stage-2 Mostafa Saleh
2023-05-15 13:15 ` Eric Auger
2023-05-12 14:46 ` [RFC PATCH v3 00/10] Add stage-2 translation for SMMUv3 Peter Maydell
2023-05-12 15:26 ` Eric Auger
2023-05-15 13:03 ` Mostafa Saleh
2023-05-15 14:34 ` Eric Auger
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