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charset=us-ascii Content-Disposition: inline In-Reply-To: Received-SPF: pass client-ip=2001:4860:4864:20::35; envelope-from=sunilvl@ventanamicro.com; helo=mail-oa1-x35.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Mon, May 08, 2023 at 04:44:22AM -0700, Andrea Bolognani wrote: > On Mon, May 08, 2023 at 04:53:46PM +0530, Sunil V L wrote: > > On Mon, May 08, 2023 at 03:00:02AM -0700, Andrea Bolognani wrote: > > > I think that it's more important to align with other architectures. > > > > > > The number of people currently running edk2 on RISC-V is probably > > > vanishingly small, and in my opinion requiring them to tweak their > > > command lines a bit is a fair price to pay to avoid having to carry a > > > subtle difference between architectures for years to come. > > > > It is not just tweaking the command line. The current EDK2 will not work > > anymore if code is moved to plfash 0 since EDK2 assumed its entry point > > is in pflash1. I agree there may not be too many users but if we have > > to align with other archs, there will be combinations of qemu and > > edk2 versions which won't work. > > Right. > > > > With that in mind, my preference would be to go back to v1. > > > > Thanks!. If this is the preference, we can request people to use proper > > versions of EDK2 with different qemu versions. > > Yeah, in the (not so) long run this will just not matter, as the > versions of edk2 and QEMU available to people will all implement the > new behavior. Better to optimize for the long future ahead of us > rather than causing ongoing pain for the sake of the few users of a > work-in-progress board. > > > > Taking a step back, what is even the use case for having M-mode code > > > in pflash0? If you want to use an M-mode firmware, can't you just use > > > -bios instead? In other words, can we change the behavior so that > > > pflash being present always mean loading S-mode firmware off it? > > > > TBH, I don't know. I am sure Alistair would know since it was added in > > https://github.com/qemu/qemu/commit/1c20d3ff6004b600336c52cbef9f134fad3ccd94 > > I don't think opensbi can be launched from pflash. So, it may be some > > other use case which I am now aware of. > > > > I will be happy if this can be avoided by using -bios. > > The actual commit would be [1], from late 2019. Things might have > changed in the intervening ~3.5 years. Let's wait to hear from > Alistair :) > > > [1] https://github.com/qemu/qemu/commit/2738b3b555efaf206b814677966e8e3510c64a8a > -- Hi Alistair, Could you please provide your inputs on whether we can remove this pflash0 check completely and assume pflash will always have S-mode payload? I realized you responded to similar patch from Yong at [1] which I missed since qemu-riscv was not copied. My v2 patch is similar to Yong's patch but the feedback from distro experts is that, it better we align with other architectures. Based on your feedback, I will modify the patch and send v3. [1] - https://lists.gnu.org/archive/html/qemu-devel/2023-05/msg04023.html Thanks Sunil