From: Sunil V L <sunilvl@ventanamicro.com>
To: Andrea Bolognani <abologna@redhat.com>
Cc: qemu-riscv@nongnu.org, qemu-devel@nongnu.org,
"Palmer Dabbelt" <palmer@dabbelt.com>,
"Alistair Francis" <alistair.francis@wdc.com>,
"Bin Meng" <bin.meng@windriver.com>,
"Weiwei Li" <liweiwei@iscas.ac.cn>,
"Daniel Henrique Barboza" <dbarboza@ventanamicro.com>,
"Liu Zhiwei" <zhiwei_liu@linux.alibaba.com>,
"Philippe Mathieu-Daudé" <philmd@linaro.org>
Subject: Re: [PATCH v6 3/3] docs/system: riscv: Add pflash usage details
Date: Wed, 31 May 2023 22:49:58 +0530 [thread overview]
Message-ID: <ZHeBvhsLQ93bw+t3@sunil-laptop> (raw)
In-Reply-To: <CABJz62PgmMQp6qcOnME-=G2h84GtW2w0M4OaLpW=Xn6+g1BxjA@mail.gmail.com>
On Wed, May 31, 2023 at 09:43:39AM -0700, Andrea Bolognani wrote:
> On Wed, May 31, 2023 at 07:53:00PM +0530, Sunil V L wrote:
> > +Using flash devices
> > +-------------------
> > +
> > +When KVM is not enabled, the first flash device (pflash0) can contain either
> > +the ROM code or S-mode payload firmware code. If the pflash0 contains the
> > +ROM code, -bios should be set to none. If -bios is not set to
> > +none, pflash0 is assumed to contain S-mode payload code.
> > +
> > +When KVM is enabled, pflash0 is always assumed to contain the S-mode payload
> > +firmware.
> > +
> > +Firmware images used for pflash should be of size 32 MiB.
> > +
> > +To boot as ROM code:
> > +
> > +.. code-block:: bash
> > +
> > + $ qemu-system-riscv64 -bios none \
> > + -blockdev node-name=pflash0,driver=file,read-only=on,filename=<rom_code> \
> > + -M virt,pflash0=pflash0 \
> > + ... other args ....
> > +
> > +To boot as read-only S-mode payload:
> > +
> > +.. code-block:: bash
> > +
> > + $ qemu-system-riscv64 \
> > + -blockdev node-name=pflash0,driver=file,read-only=on,filename=<s-mode_fw_code> \
> > + -blockdev node-name=pflash1,driver=file,filename=<s-mode_fw_vars> \
> > + -M virt,pflash0=pflash0,pflash1=pflash1 \
> > + ... other args ....
> > +
> > +To boot as read-only S-mode payload in KVM guest:
> > +
> > +.. code-block:: bash
> > +
> > + $ qemu-system-riscv64 \
> > + -blockdev node-name=pflash0,driver=file,read-only=on,filename=<s-mode_fw_code> \
> > + -blockdev node-name=pflash1,driver=file,filename=<s-mode_fw_vars> \
> > + -M virt,pflash0=pflash0,pflash1=pflash1 \
> > + --enable-kvm \
> > + ... other args ....
>
> I feel that this, while accurate, has gotten more complicated than it
> needs to be. We're also putting the least common scenario front and
> center instead of opening with the one that most people are going to
> be using.
>
> Below is how I suggest reworking it. What do you think?
>
>
>
> Using flash devices
> -------------------
>
> By default, the first flash device (pflash0) is expected to contain
> S-mode firmware code. It can be configured as read-only, with the
> second flash device (pflash1) available to store configuration data.
>
> For example, booting edk2 looks like
>
> ..code-block:: bash
>
> $ qemu-system-riscv64 \
> -blockdev node-name=pflash0,driver=file,read-only=on,filename=<edk2_code> \
> -blockdev node-name=pflash1,driver=file,filename=<edk2_vars> \
> -M virt,pflash0=pflash0,pflash1=pflash1 \
> ... other args ....
>
> For TCG guests only, it is also possible to boot M-mode firmware from
> the first flash device (pflash0) by additionally passing ``-bios
> none``, as in
>
> ..code-block:: bash
>
> $ qemu-system-riscv64 \
> -bios none \
> -blockdev node-name=pflash0,driver=file,read-only=on,filename=<m_mode_code>
> \
> -M virt,pflash0=pflash0 \
> ... other args ....
>
> Firmware images used for pflash must be exactly 32 MiB in size.
>
Hi Andrea,
This looks great! Thank you very much. Unless I see an objection, I will
use this text in the next revision of the series tomorrow.
Thanks!
Sunil
prev parent reply other threads:[~2023-05-31 17:20 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-31 14:22 [PATCH v6 0/3] hw/riscv/virt: pflash improvements Sunil V L
2023-05-31 14:22 ` [PATCH v6 1/3] hw/riscv: virt: Assume M-mode FW in pflash0 only when "-bios none" Sunil V L
2023-05-31 14:22 ` [PATCH v6 2/3] riscv/virt: Support using pflash via -blockdev option Sunil V L
2023-05-31 14:23 ` [PATCH v6 3/3] docs/system: riscv: Add pflash usage details Sunil V L
2023-05-31 16:43 ` Andrea Bolognani
2023-05-31 17:19 ` Sunil V L [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=ZHeBvhsLQ93bw+t3@sunil-laptop \
--to=sunilvl@ventanamicro.com \
--cc=abologna@redhat.com \
--cc=alistair.francis@wdc.com \
--cc=bin.meng@windriver.com \
--cc=dbarboza@ventanamicro.com \
--cc=liweiwei@iscas.ac.cn \
--cc=palmer@dabbelt.com \
--cc=philmd@linaro.org \
--cc=qemu-devel@nongnu.org \
--cc=qemu-riscv@nongnu.org \
--cc=zhiwei_liu@linux.alibaba.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).