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From: Peter Xu <peterx@redhat.com>
To: Bui Quang Minh <minhquangbui99@gmail.com>
Cc: "Joao Martins" <joao.m.martins@oracle.com>,
	"David Woodhouse" <dwmw2@infradead.org>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Eduardo Habkost" <eduardo@habkost.net>,
	"Michael S . Tsirkin" <mst@redhat.com>,
	"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
	"Igor Mammedov" <imammedo@redhat.com>,
	"Alex Bennée" <alex.bennee@linaro.org>,
	qemu-devel@nongnu.org, "Jason Wang" <jasowang@redhat.com>
Subject: Re: [PATCH v6 4/5] intel_iommu: allow Extended Interrupt Mode when using userspace APIC
Date: Thu, 20 Jul 2023 16:47:22 -0400	[thread overview]
Message-ID: <ZLmdWv0YndpUe9iM@x1n> (raw)
In-Reply-To: <adf436ea-8b4a-be24-4df4-7f018975b1e9@gmail.com>

On Mon, Jul 17, 2023 at 11:29:56PM +0700, Bui Quang Minh wrote:
> On 7/17/23 17:47, Joao Martins wrote:
> > +Peter, +Jason (intel-iommu maintainer/reviewer)

Thanks for copying me, Joan.

> > 
> > On 15/07/2023 16:22, Bui Quang Minh wrote:
> > > As userspace APIC now supports x2APIC, intel interrupt remapping
> > > hardware can be set to EIM mode when userspace local APIC is used.
> > > 
> > > Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
> > > Signed-off-by: Bui Quang Minh <minhquangbui99@gmail.com>
> > > ---
> > >   hw/i386/intel_iommu.c | 11 -----------
> > >   1 file changed, 11 deletions(-)
> > > 
> > > diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
> > > index dcc334060c..5e576f6059 100644
> > > --- a/hw/i386/intel_iommu.c
> > > +++ b/hw/i386/intel_iommu.c
> > > @@ -4043,17 +4043,6 @@ static bool vtd_decide_config(IntelIOMMUState *s, Error **errp)
> > >                         && x86_iommu_ir_supported(x86_iommu) ?
> > >                                                 ON_OFF_AUTO_ON : ON_OFF_AUTO_OFF;
> > >       }
> > > -    if (s->intr_eim == ON_OFF_AUTO_ON && !s->buggy_eim) {
> > > -        if (!kvm_irqchip_is_split()) {
> > > -            error_setg(errp, "eim=on requires accel=kvm,kernel-irqchip=split");
> > > -            return false;
> > > -        }
> > > -        if (!kvm_enable_x2apic()) {
> > > -            error_setg(errp, "eim=on requires support on the KVM side"
> > > -                             "(X2APIC_API, first shipped in v4.7)");
> > > -            return false;
> > > -        }
> > > -    }
> > Given commit 20ca47429e ('Revert "intel_iommu: Fix irqchip / X2APIC
> > configuration checks"'), won't we regress behaviour again  for the accel=kvm
> > case by dropping the kvm_enable_x2apic() call here?
> > 
> > Perhaps if we support userspace APIC with TCG the check just needs to be redone
> > to instead avoid always requiring kvm e.g.:
> > 
> > if (kvm_irqchip_in_kernel()) {
> >      error_setg(errp, "eim=on requires accel=kvm,kernel-irqchip=split"
> >                 "(X2APIC_API, first shipped in v4.7)");
> > }
> > 
> > if (kvm_irqchip_is_split() && !kvm_enable_x2apic()) {
> >      error_setg(errp, "eim=on requires support on the KVM side"
> >                 "(X2APIC_API, first shipped in v4.7)");
> >      return false;
> > }
> 
> Thank you for your review. I think the check for kvm_irqchip_in_kernel() is
> not correct, AFAIK, kvm_irqchip_is_split() == true also means
> kvm_irqchip_in_kernel() == true on x86. To check if kernel-irqchip = on, we
> need to do something like in x86_iommu_realize
> 
>     bool irq_all_kernel = kvm_irqchip_in_kernel() &&
> !kvm_irqchip_is_split();
> 
> The original check for !kvm_irqchip_is_split means emulated/userspace APIC.
> It's because to reach that check x86_iommu_ir_supported(...) == true and
> x86_iommu_ir_supported(...) == true is not supported when kernel-irqchip =
> on (there is a check for this in x86_iommu_realize)
> 
> So I think we need to change the check to
> 
>     if (s->intr_eim == ON_OFF_AUTO_ON && !s->buggy_eim) {
>         if (kvm_irqchip_is_split() && !kvm_enable_x2apic()) {
>             error_setg(errp, "eim=on requires support on the KVM side"
>                              "(X2APIC_API, first shipped in v4.7)");
>             return false;
>         }
>     }
> 
> Is it OK?

Mostly to me, except that we may also want to keep failing if all irq chips
are in kernel?

Thanks,

-- 
Peter Xu



  reply	other threads:[~2023-07-20 20:47 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-15 15:22 [PATCH v6 0/5] Support x2APIC mode with TCG accelerator Bui Quang Minh
2023-07-15 15:22 ` [PATCH v6 1/5] i386/tcg: implement x2APIC registers MSR access Bui Quang Minh
2023-07-15 15:22 ` [PATCH v6 2/5] apic: add support for x2APIC mode Bui Quang Minh
2023-07-15 15:22 ` [PATCH v6 3/5] apic, i386/tcg: add x2apic transitions Bui Quang Minh
2023-07-15 15:22 ` [PATCH v6 4/5] intel_iommu: allow Extended Interrupt Mode when using userspace APIC Bui Quang Minh
2023-07-17 10:47   ` Joao Martins
2023-07-17 16:29     ` Bui Quang Minh
2023-07-20 20:47       ` Peter Xu [this message]
2023-07-21 15:35         ` Bui Quang Minh
2023-07-26 17:22           ` Peter Xu
2023-07-15 15:22 ` [PATCH v6 5/5] amd_iommu: report x2APIC support to the operating system Bui Quang Minh

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