qemu-devel.nongnu.org archive mirror
 help / color / mirror / Atom feed
From: Zhao Liu <zhao1.liu@linux.intel.com>
To: "Moger, Babu" <babu.moger@amd.com>
Cc: "Eduardo Habkost" <eduardo@habkost.net>,
	"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Yanan Wang" <wangyanan55@huawei.com>,
	"Michael S . Tsirkin" <mst@redhat.com>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	qemu-devel@nongnu.org, "Zhenyu Wang" <zhenyu.z.wang@intel.com>,
	"Xiaoyao Li" <xiaoyao.li@intel.com>,
	"Zhao Liu" <zhao1.liu@intel.com>,
	"Robert Hoo" <robert.hu@linux.intel.com>
Subject: Re: [PATCH v3 06/17] i386/cpu: Consolidate the use of topo_info in cpu_x86_cpuid()
Date: Fri, 4 Aug 2023 16:23:09 +0800	[thread overview]
Message-ID: <ZMy1bcxc9prSUcIS@liuzhao-OptiPlex-7080> (raw)
In-Reply-To: <c0307538-e1cc-f675-8c5e-1973f40fdaaa@amd.com>

Hi Babu,

On Wed, Aug 02, 2023 at 11:31:46AM -0500, Moger, Babu wrote:
> Date: Wed, 2 Aug 2023 11:31:46 -0500
> From: "Moger, Babu" <babu.moger@amd.com>
> Subject: Re: [PATCH v3 06/17] i386/cpu: Consolidate the use of topo_info in
>  cpu_x86_cpuid()
> 
> Hi Zhao,
> 
> On 8/1/23 05:35, Zhao Liu wrote:
> > From: Zhao Liu <zhao1.liu@intel.com>
> > 
> > In cpu_x86_cpuid(), there are many variables in representing the cpu
> > topology, e.g., topo_info, cs->nr_cores/cs->nr_threads.
> > 
> > Since the names of cs->nr_cores/cs->nr_threads does not accurately
> > represent its meaning, the use of cs->nr_cores/cs->nr_threads is prone
> > to confusion and mistakes.
> > 
> > And the structure X86CPUTopoInfo names its memebers clearly, thus the
> 
> s/memebers/members/

Thanks! I'll be more careful with my spelling.

-Zhao


> Thanks
> Babu
> 
> > variable "topo_info" should be preferred.
> > 
> > In addition, in cpu_x86_cpuid(), to uniformly use the topology variable,
> > replace env->dies with topo_info.dies_per_pkg as well.
> > 
> > Suggested-by: Robert Hoo <robert.hu@linux.intel.com>
> > Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
> > ---
> > Changes since v1:
> >  * Extract cores_per_socket from the code block and use it as a local
> >    variable for cpu_x86_cpuid(). (Yanan)
> >  * Remove vcpus_per_socket variable and use cpus_per_pkg directly.
> >    (Yanan)
> >  * Replace env->dies with topo_info.dies_per_pkg in cpu_x86_cpuid().
> > ---
> >  target/i386/cpu.c | 31 ++++++++++++++++++-------------
> >  1 file changed, 18 insertions(+), 13 deletions(-)
> > 
> > diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> > index c80613bfcded..fc50bf98c60e 100644
> > --- a/target/i386/cpu.c
> > +++ b/target/i386/cpu.c
> > @@ -6008,11 +6008,16 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
> >      uint32_t limit;
> >      uint32_t signature[3];
> >      X86CPUTopoInfo topo_info;
> > +    uint32_t cores_per_pkg;
> > +    uint32_t cpus_per_pkg;
> >  
> >      topo_info.dies_per_pkg = env->nr_dies;
> >      topo_info.cores_per_die = cs->nr_cores / env->nr_dies;
> >      topo_info.threads_per_core = cs->nr_threads;
> >  
> > +    cores_per_pkg = topo_info.cores_per_die * topo_info.dies_per_pkg;
> > +    cpus_per_pkg = cores_per_pkg * topo_info.threads_per_core;
> > +
> >      /* Calculate & apply limits for different index ranges */
> >      if (index >= 0xC0000000) {
> >          limit = env->cpuid_xlevel2;
> > @@ -6048,8 +6053,8 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
> >              *ecx |= CPUID_EXT_OSXSAVE;
> >          }
> >          *edx = env->features[FEAT_1_EDX];
> > -        if (cs->nr_cores * cs->nr_threads > 1) {
> > -            *ebx |= (cs->nr_cores * cs->nr_threads) << 16;
> > +        if (cpus_per_pkg > 1) {
> > +            *ebx |= cpus_per_pkg << 16;
> >              *edx |= CPUID_HT;
> >          }
> >          if (!cpu->enable_pmu) {
> > @@ -6086,8 +6091,8 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
> >               */
> >              if (*eax & 31) {
> >                  int host_vcpus_per_cache = 1 + ((*eax & 0x3FFC000) >> 14);
> > -                int vcpus_per_socket = cs->nr_cores * cs->nr_threads;
> > -                if (cs->nr_cores > 1) {
> > +
> > +                if (cores_per_pkg > 1) {
> >                      int addressable_cores_offset =
> >                                                  apicid_pkg_offset(&topo_info) -
> >                                                  apicid_core_offset(&topo_info);
> > @@ -6095,7 +6100,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
> >                      *eax &= ~0xFC000000;
> >                      *eax |= (1 << addressable_cores_offset - 1) << 26;
> >                  }
> > -                if (host_vcpus_per_cache > vcpus_per_socket) {
> > +                if (host_vcpus_per_cache > cpus_per_pkg) {
> >                      int pkg_offset = apicid_pkg_offset(&topo_info);
> >  
> >                      *eax &= ~0x3FFC000;
> > @@ -6240,12 +6245,12 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
> >          switch (count) {
> >          case 0:
> >              *eax = apicid_core_offset(&topo_info);
> > -            *ebx = cs->nr_threads;
> > +            *ebx = topo_info.threads_per_core;
> >              *ecx |= CPUID_TOPOLOGY_LEVEL_SMT;
> >              break;
> >          case 1:
> >              *eax = apicid_pkg_offset(&topo_info);
> > -            *ebx = cs->nr_cores * cs->nr_threads;
> > +            *ebx = cpus_per_pkg;
> >              *ecx |= CPUID_TOPOLOGY_LEVEL_CORE;
> >              break;
> >          default:
> > @@ -6266,7 +6271,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
> >          break;
> >      case 0x1F:
> >          /* V2 Extended Topology Enumeration Leaf */
> > -        if (env->nr_dies < 2) {
> > +        if (topo_info.dies_per_pkg < 2) {
> >              *eax = *ebx = *ecx = *edx = 0;
> >              break;
> >          }
> > @@ -6276,7 +6281,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
> >          switch (count) {
> >          case 0:
> >              *eax = apicid_core_offset(&topo_info);
> > -            *ebx = cs->nr_threads;
> > +            *ebx = topo_info.threads_per_core;
> >              *ecx |= CPUID_TOPOLOGY_LEVEL_SMT;
> >              break;
> >          case 1:
> > @@ -6286,7 +6291,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
> >              break;
> >          case 2:
> >              *eax = apicid_pkg_offset(&topo_info);
> > -            *ebx = cs->nr_cores * cs->nr_threads;
> > +            *ebx = cpus_per_pkg;
> >              *ecx |= CPUID_TOPOLOGY_LEVEL_DIE;
> >              break;
> >          default:
> > @@ -6511,7 +6516,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
> >           * discards multiple thread information if it is set.
> >           * So don't set it here for Intel to make Linux guests happy.
> >           */
> > -        if (cs->nr_cores * cs->nr_threads > 1) {
> > +        if (cpus_per_pkg > 1) {
> >              if (env->cpuid_vendor1 != CPUID_VENDOR_INTEL_1 ||
> >                  env->cpuid_vendor2 != CPUID_VENDOR_INTEL_2 ||
> >                  env->cpuid_vendor3 != CPUID_VENDOR_INTEL_3) {
> > @@ -6577,7 +6582,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
> >               *eax |= (cpu_x86_virtual_addr_width(env) << 8);
> >          }
> >          *ebx = env->features[FEAT_8000_0008_EBX];
> > -        if (cs->nr_cores * cs->nr_threads > 1) {
> > +        if (cpus_per_pkg > 1) {
> >              /*
> >               * Bits 15:12 is "The number of bits in the initial
> >               * Core::X86::Apic::ApicId[ApicId] value that indicate
> > @@ -6585,7 +6590,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
> >               * Bits 7:0 is "The number of threads in the package is NC+1"
> >               */
> >              *ecx = (apicid_pkg_offset(&topo_info) << 12) |
> > -                   ((cs->nr_cores * cs->nr_threads) - 1);
> > +                   (cpus_per_pkg - 1);
> >          } else {
> >              *ecx = 0;
> >          }
> 
> -- 
> Thanks
> Babu Moger


  reply	other threads:[~2023-08-04  8:14 UTC|newest]

Thread overview: 63+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-01 10:35 [PATCH v3 00/17] Support smp.clusters for x86 Zhao Liu
2023-08-01 10:35 ` [PATCH v3 01/17] i386: Fix comment style in topology.h Zhao Liu
2023-08-01 23:13   ` Moger, Babu
2023-08-04  8:12     ` Zhao Liu
2023-08-07  2:16   ` Xiaoyao Li
2023-08-07  7:05     ` Zhao Liu
2023-08-01 10:35 ` [PATCH v3 02/17] tests: Rename test-x86-cpuid.c to test-x86-topo.c Zhao Liu
2023-08-01 23:20   ` Moger, Babu
2023-08-04  8:14     ` Zhao Liu
2023-08-01 10:35 ` [PATCH v3 03/17] softmmu: Fix CPUSTATE.nr_cores' calculation Zhao Liu
2023-08-02 15:25   ` Moger, Babu
2023-08-04  8:16     ` Zhao Liu
2023-08-07  7:03   ` Xiaoyao Li
2023-08-07  7:53     ` Zhao Liu
2023-08-07  8:43       ` Xiaoyao Li
2023-08-07 10:00         ` Zhao Liu
2023-08-07 14:20           ` Xiaoyao Li
2023-08-07 14:42             ` Zhao Liu
2023-08-01 10:35 ` [PATCH v3 04/17] i386/cpu: Fix i/d-cache topology to core level for Intel CPU Zhao Liu
2023-08-04  9:56   ` Xiaoyao Li
2023-08-04 12:43     ` Zhao Liu
2023-08-01 10:35 ` [PATCH v3 05/17] i386/cpu: Use APIC ID offset to encode cache topo in CPUID[4] Zhao Liu
2023-08-02 15:41   ` Moger, Babu
2023-08-04  8:21     ` Zhao Liu
2023-08-07  8:13   ` Xiaoyao Li
2023-08-07  9:30     ` Zhao Liu
2023-08-01 10:35 ` [PATCH v3 06/17] i386/cpu: Consolidate the use of topo_info in cpu_x86_cpuid() Zhao Liu
2023-08-02 16:31   ` Moger, Babu
2023-08-04  8:23     ` Zhao Liu [this message]
2023-08-01 10:35 ` [PATCH v3 07/17] i386: Introduce module-level cpu topology to CPUX86State Zhao Liu
2023-08-01 10:35 ` [PATCH v3 08/17] i386: Support modules_per_die in X86CPUTopoInfo Zhao Liu
2023-08-02 17:25   ` Moger, Babu
2023-08-04  9:05     ` Zhao Liu
2023-08-01 10:35 ` [PATCH v3 09/17] i386: Support module_id in X86CPUTopoIDs Zhao Liu
2023-08-01 10:35 ` [PATCH v3 10/17] i386/cpu: Introduce cluster-id to X86CPU Zhao Liu
2023-08-02 22:44   ` Moger, Babu
2023-08-04  9:06     ` Zhao Liu
2023-08-01 10:35 ` [PATCH v3 11/17] tests: Add test case of APIC ID for module level parsing Zhao Liu
2023-08-01 10:35 ` [PATCH v3 12/17] hw/i386/pc: Support smp.clusters for x86 PC machine Zhao Liu
2023-08-01 10:35 ` [PATCH v3 13/17] i386: Add cache topology info in CPUCacheInfo Zhao Liu
2023-08-01 10:35 ` [PATCH v3 14/17] i386: Use CPUCacheInfo.share_level to encode CPUID[4] Zhao Liu
2023-08-02 23:49   ` Moger, Babu
2023-08-03 16:41     ` Moger, Babu
2023-08-04  9:48       ` Zhao Liu
2023-08-04 15:48         ` Moger, Babu
2023-08-14  8:22           ` Zhao Liu
2023-08-14 16:03             ` Moger, Babu
2023-08-18  7:37               ` Zhao Liu
2023-08-23 17:18                 ` Moger, Babu
2023-09-01  8:43                   ` Zhao Liu
2023-08-01 10:35 ` [PATCH v3 15/17] i386: Fix NumSharingCache for CPUID[0x8000001D].EAX[bits 25:14] Zhao Liu
2023-08-03 20:40   ` Moger, Babu
2023-08-04  9:50     ` Zhao Liu
2023-08-01 10:35 ` [PATCH v3 16/17] i386: Use CPUCacheInfo.share_level to encode " Zhao Liu
2023-08-03 20:44   ` Moger, Babu
2023-08-04  9:56     ` Zhao Liu
2023-08-04 18:50       ` Moger, Babu
2023-08-01 10:35 ` [PATCH v3 17/17] i386: Add new property to control L2 cache topo in CPUID.04H Zhao Liu
2023-08-01 15:35 ` [PATCH v3 00/17] Support smp.clusters for x86 Jonathan Cameron via
2023-08-04 13:17   ` Zhao Liu
2023-08-08 11:52     ` Jonathan Cameron via
2023-08-01 23:11 ` Moger, Babu
2023-08-04  7:44   ` Zhao Liu

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=ZMy1bcxc9prSUcIS@liuzhao-OptiPlex-7080 \
    --to=zhao1.liu@linux.intel.com \
    --cc=babu.moger@amd.com \
    --cc=eduardo@habkost.net \
    --cc=marcel.apfelbaum@gmail.com \
    --cc=mst@redhat.com \
    --cc=pbonzini@redhat.com \
    --cc=philmd@linaro.org \
    --cc=qemu-devel@nongnu.org \
    --cc=richard.henderson@linaro.org \
    --cc=robert.hu@linux.intel.com \
    --cc=wangyanan55@huawei.com \
    --cc=xiaoyao.li@intel.com \
    --cc=zhao1.liu@intel.com \
    --cc=zhenyu.z.wang@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).