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From: Zhao Liu <zhao1.liu@linux.intel.com>
To: "Moger, Babu" <babu.moger@amd.com>
Cc: "Eduardo Habkost" <eduardo@habkost.net>,
	"Marcel Apfelbaum" <marcel.apfelbaum@gmail.com>,
	"Philippe Mathieu-Daudé" <philmd@linaro.org>,
	"Yanan Wang" <wangyanan55@huawei.com>,
	"Michael S . Tsirkin" <mst@redhat.com>,
	"Richard Henderson" <richard.henderson@linaro.org>,
	"Paolo Bonzini" <pbonzini@redhat.com>,
	qemu-devel@nongnu.org, "Zhenyu Wang" <zhenyu.z.wang@intel.com>,
	"Xiaoyao Li" <xiaoyao.li@intel.com>,
	"Zhao Liu" <zhao1.liu@intel.com>,
	"Zhuocheng Ding" <zhuocheng.ding@intel.com>
Subject: Re: [PATCH v3 03/17] softmmu: Fix CPUSTATE.nr_cores' calculation
Date: Fri, 4 Aug 2023 16:16:51 +0800	[thread overview]
Message-ID: <ZMyz82EjuASaFsxg@liuzhao-OptiPlex-7080> (raw)
In-Reply-To: <275a4850-2d70-4a6e-a72e-5c3fd20f98ba@amd.com>

Hi Babu,

On Wed, Aug 02, 2023 at 10:25:58AM -0500, Moger, Babu wrote:
> Date: Wed, 2 Aug 2023 10:25:58 -0500
> From: "Moger, Babu" <babu.moger@amd.com>
> Subject: Re: [PATCH v3 03/17] softmmu: Fix CPUSTATE.nr_cores' calculation
> 
> Hi Zhao,
> 
> On 8/1/23 05:35, Zhao Liu wrote:
> > From: Zhuocheng Ding <zhuocheng.ding@intel.com>
> > 
> > From CPUState.nr_cores' comment, it represents "number of cores within
> > this CPU package".
> > 
> > After 003f230e37d7 ("machine: Tweak the order of topology members in
> > struct CpuTopology"), the meaning of smp.cores changed to "the number of
> > cores in one die", but this commit missed to change CPUState.nr_cores'
> > caculation, so that CPUState.nr_cores became wrong and now it
> > misses to consider numbers of clusters and dies.
> > 
> > At present, only i386 is using CPUState.nr_cores.
> > 
> > But as for i386, which supports die level, the uses of CPUState.nr_cores
> > are very confusing:
> > 
> > Early uses are based on the meaning of "cores per package" (before die
> > is introduced into i386), and later uses are based on "cores per die"
> > (after die's introduction).
> > 
> > This difference is due to that commit a94e1428991f ("target/i386: Add
> > CPUID.1F generation support for multi-dies PCMachine") misunderstood
> > that CPUState.nr_cores means "cores per die" when caculated
> > CPUID.1FH.01H:EBX. After that, the changes in i386 all followed this
> > wrong understanding.
> > 
> > With the influence of 003f230e37d7 and a94e1428991f, for i386 currently
> > the result of CPUState.nr_cores is "cores per die", thus the original
> > uses of CPUState.cores based on the meaning of "cores per package" are
> > wrong when mutiple dies exist:
> > 1. In cpu_x86_cpuid() of target/i386/cpu.c, CPUID.01H:EBX[bits 23:16] is
> >    incorrect because it expects "cpus per package" but now the
> >    result is "cpus per die".
> > 2. In cpu_x86_cpuid() of target/i386/cpu.c, for all leaves of CPUID.04H:
> >    EAX[bits 31:26] is incorrect because they expect "cpus per package"
> >    but now the result is "cpus per die". The error not only impacts the
> >    EAX caculation in cache_info_passthrough case, but also impacts other
> >    cases of setting cache topology for Intel CPU according to cpu
> >    topology (specifically, the incoming parameter "num_cores" expects
> >    "cores per package" in encode_cache_cpuid4()).
> > 3. In cpu_x86_cpuid() of target/i386/cpu.c, CPUID.0BH.01H:EBX[bits
> >    15:00] is incorrect because the EBX of 0BH.01H (core level) expects
> >    "cpus per package", which may be different with 1FH.01H (The reason
> >    is 1FH can support more levels. For QEMU, 1FH also supports die,
> >    1FH.01H:EBX[bits 15:00] expects "cpus per die").
> > 4. In cpu_x86_cpuid() of target/i386/cpu.c, when CPUID.80000001H is
> >    caculated, here "cpus per package" is expected to be checked, but in
> >    fact, now it checks "cpus per die". Though "cpus per die" also works
> >    for this code logic, this isn't consistent with AMD's APM.
> > 5. In cpu_x86_cpuid() of target/i386/cpu.c, CPUID.80000008H:ECX expects
> >    "cpus per package" but it obtains "cpus per die".
> > 6. In simulate_rdmsr() of target/i386/hvf/x86_emu.c, in
> >    kvm_rdmsr_core_thread_count() of target/i386/kvm/kvm.c, and in
> >    helper_rdmsr() of target/i386/tcg/sysemu/misc_helper.c,
> >    MSR_CORE_THREAD_COUNT expects "cpus per package" and "cores per
> >    package", but in these functions, it obtains "cpus per die" and
> >    "cores per die".
> > 
> > On the other hand, these uses are correct now (they are added in/after
> > a94e1428991f):
> > 1. In cpu_x86_cpuid() of target/i386/cpu.c, topo_info.cores_per_die
> >    meets the actual meaning of CPUState.nr_cores ("cores per die").
> > 2. In cpu_x86_cpuid() of target/i386/cpu.c, vcpus_per_socket (in CPUID.
> >    04H's caculation) considers number of dies, so it's correct.
> > 3. In cpu_x86_cpuid() of target/i386/cpu.c, CPUID.1FH.01H:EBX[bits
> >    15:00] needs "cpus per die" and it gets the correct result, and
> >    CPUID.1FH.02H:EBX[bits 15:00] gets correct "cpus per package".
> > 
> > When CPUState.nr_cores is correctly changed to "cores per package" again
> > , the above errors will be fixed without extra work, but the "currently"
> > correct cases will go wrong and need special handling to pass correct
> > "cpus/cores per die" they want.
> > 
> > Thus in this patch, we fix CPUState.nr_cores' caculation to fit the
> 
> s/Thus in this patch, we fix CPUState.nr_cores' caculation/Fix
> CPUState.nr_cores' calculation/

Thanks!

> 
> 
> Describe your changes in imperative mood also spell check.

Thanks for your suggestion!

-Zhao

> 
> 
> > original meaning "cores per package", as well as changing calculation of
> > topo_info.cores_per_die, vcpus_per_socket and CPUID.1FH.
> > 
> > In addition, in the nr_threads' comment, specify it represents the
> > number of threads in the "core" to avoid confusion, and also add comment
> > for nr_dies in CPUX86State.
> > 
> > Fixes: a94e1428991f ("target/i386: Add CPUID.1F generation support for multi-dies PCMachine")
> > Fixes: 003f230e37d7 ("machine: Tweak the order of topology members in struct CpuTopology")
> > Signed-off-by: Zhuocheng Ding <zhuocheng.ding@intel.com>
> > Co-developed-by: Zhao Liu <zhao1.liu@intel.com>
> > Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
> > ---
> > Changes since v2:
> >  * Use wrapped helper to get cores per socket in qemu_init_vcpu().
> > Changes since v1:
> >  * Add comment for nr_dies in CPUX86State. (Yanan)
> > ---
> >  include/hw/core/cpu.h | 2 +-
> >  softmmu/cpus.c        | 2 +-
> >  target/i386/cpu.c     | 9 ++++-----
> >  target/i386/cpu.h     | 1 +
> >  4 files changed, 7 insertions(+), 7 deletions(-)
> > 
> > diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
> > index fdcbe8735258..57f4d50ace72 100644
> > --- a/include/hw/core/cpu.h
> > +++ b/include/hw/core/cpu.h
> > @@ -277,7 +277,7 @@ struct qemu_work_item;
> >   *   See TranslationBlock::TCG CF_CLUSTER_MASK.
> >   * @tcg_cflags: Pre-computed cflags for this cpu.
> >   * @nr_cores: Number of cores within this CPU package.
> > - * @nr_threads: Number of threads within this CPU.
> > + * @nr_threads: Number of threads within this CPU core.
> >   * @running: #true if CPU is currently running (lockless).
> >   * @has_waiter: #true if a CPU is currently waiting for the cpu_exec_end;
> >   * valid under cpu_list_lock.
> > diff --git a/softmmu/cpus.c b/softmmu/cpus.c
> > index fed20ffb5dd2..984558d7b245 100644
> > --- a/softmmu/cpus.c
> > +++ b/softmmu/cpus.c
> > @@ -630,7 +630,7 @@ void qemu_init_vcpu(CPUState *cpu)
> >  {
> >      MachineState *ms = MACHINE(qdev_get_machine());
> >  
> > -    cpu->nr_cores = ms->smp.cores;
> > +    cpu->nr_cores = machine_topo_get_cores_per_socket(ms);
> >      cpu->nr_threads =  ms->smp.threads;
> >      cpu->stopped = true;
> >      cpu->random_seed = qemu_guest_random_seed_thread_part1();
> > diff --git a/target/i386/cpu.c b/target/i386/cpu.c
> > index 97ad229d8ba3..50613cd04612 100644
> > --- a/target/i386/cpu.c
> > +++ b/target/i386/cpu.c
> > @@ -6011,7 +6011,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
> >      X86CPUTopoInfo topo_info;
> >  
> >      topo_info.dies_per_pkg = env->nr_dies;
> > -    topo_info.cores_per_die = cs->nr_cores;
> > +    topo_info.cores_per_die = cs->nr_cores / env->nr_dies;
> >      topo_info.threads_per_core = cs->nr_threads;
> >  
> >      /* Calculate & apply limits for different index ranges */
> > @@ -6087,8 +6087,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
> >               */
> >              if (*eax & 31) {
> >                  int host_vcpus_per_cache = 1 + ((*eax & 0x3FFC000) >> 14);
> > -                int vcpus_per_socket = env->nr_dies * cs->nr_cores *
> > -                                       cs->nr_threads;
> > +                int vcpus_per_socket = cs->nr_cores * cs->nr_threads;
> >                  if (cs->nr_cores > 1) {
> >                      *eax &= ~0xFC000000;
> >                      *eax |= (pow2ceil(cs->nr_cores) - 1) << 26;
> > @@ -6266,12 +6265,12 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, uint32_t count,
> >              break;
> >          case 1:
> >              *eax = apicid_die_offset(&topo_info);
> > -            *ebx = cs->nr_cores * cs->nr_threads;
> > +            *ebx = topo_info.cores_per_die * topo_info.threads_per_core;
> >              *ecx |= CPUID_TOPOLOGY_LEVEL_CORE;
> >              break;
> >          case 2:
> >              *eax = apicid_pkg_offset(&topo_info);
> > -            *ebx = env->nr_dies * cs->nr_cores * cs->nr_threads;
> > +            *ebx = cs->nr_cores * cs->nr_threads;
> >              *ecx |= CPUID_TOPOLOGY_LEVEL_DIE;
> >              break;
> >          default:
> > diff --git a/target/i386/cpu.h b/target/i386/cpu.h
> > index e0771a10433b..7638128d59cc 100644
> > --- a/target/i386/cpu.h
> > +++ b/target/i386/cpu.h
> > @@ -1878,6 +1878,7 @@ typedef struct CPUArchState {
> >  
> >      TPRAccess tpr_access_type;
> >  
> > +    /* Number of dies within this CPU package. */
> >      unsigned nr_dies;
> >  } CPUX86State;
> >  
> 
> -- 
> Thanks
> Babu Moger


  reply	other threads:[~2023-08-04  8:08 UTC|newest]

Thread overview: 63+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-08-01 10:35 [PATCH v3 00/17] Support smp.clusters for x86 Zhao Liu
2023-08-01 10:35 ` [PATCH v3 01/17] i386: Fix comment style in topology.h Zhao Liu
2023-08-01 23:13   ` Moger, Babu
2023-08-04  8:12     ` Zhao Liu
2023-08-07  2:16   ` Xiaoyao Li
2023-08-07  7:05     ` Zhao Liu
2023-08-01 10:35 ` [PATCH v3 02/17] tests: Rename test-x86-cpuid.c to test-x86-topo.c Zhao Liu
2023-08-01 23:20   ` Moger, Babu
2023-08-04  8:14     ` Zhao Liu
2023-08-01 10:35 ` [PATCH v3 03/17] softmmu: Fix CPUSTATE.nr_cores' calculation Zhao Liu
2023-08-02 15:25   ` Moger, Babu
2023-08-04  8:16     ` Zhao Liu [this message]
2023-08-07  7:03   ` Xiaoyao Li
2023-08-07  7:53     ` Zhao Liu
2023-08-07  8:43       ` Xiaoyao Li
2023-08-07 10:00         ` Zhao Liu
2023-08-07 14:20           ` Xiaoyao Li
2023-08-07 14:42             ` Zhao Liu
2023-08-01 10:35 ` [PATCH v3 04/17] i386/cpu: Fix i/d-cache topology to core level for Intel CPU Zhao Liu
2023-08-04  9:56   ` Xiaoyao Li
2023-08-04 12:43     ` Zhao Liu
2023-08-01 10:35 ` [PATCH v3 05/17] i386/cpu: Use APIC ID offset to encode cache topo in CPUID[4] Zhao Liu
2023-08-02 15:41   ` Moger, Babu
2023-08-04  8:21     ` Zhao Liu
2023-08-07  8:13   ` Xiaoyao Li
2023-08-07  9:30     ` Zhao Liu
2023-08-01 10:35 ` [PATCH v3 06/17] i386/cpu: Consolidate the use of topo_info in cpu_x86_cpuid() Zhao Liu
2023-08-02 16:31   ` Moger, Babu
2023-08-04  8:23     ` Zhao Liu
2023-08-01 10:35 ` [PATCH v3 07/17] i386: Introduce module-level cpu topology to CPUX86State Zhao Liu
2023-08-01 10:35 ` [PATCH v3 08/17] i386: Support modules_per_die in X86CPUTopoInfo Zhao Liu
2023-08-02 17:25   ` Moger, Babu
2023-08-04  9:05     ` Zhao Liu
2023-08-01 10:35 ` [PATCH v3 09/17] i386: Support module_id in X86CPUTopoIDs Zhao Liu
2023-08-01 10:35 ` [PATCH v3 10/17] i386/cpu: Introduce cluster-id to X86CPU Zhao Liu
2023-08-02 22:44   ` Moger, Babu
2023-08-04  9:06     ` Zhao Liu
2023-08-01 10:35 ` [PATCH v3 11/17] tests: Add test case of APIC ID for module level parsing Zhao Liu
2023-08-01 10:35 ` [PATCH v3 12/17] hw/i386/pc: Support smp.clusters for x86 PC machine Zhao Liu
2023-08-01 10:35 ` [PATCH v3 13/17] i386: Add cache topology info in CPUCacheInfo Zhao Liu
2023-08-01 10:35 ` [PATCH v3 14/17] i386: Use CPUCacheInfo.share_level to encode CPUID[4] Zhao Liu
2023-08-02 23:49   ` Moger, Babu
2023-08-03 16:41     ` Moger, Babu
2023-08-04  9:48       ` Zhao Liu
2023-08-04 15:48         ` Moger, Babu
2023-08-14  8:22           ` Zhao Liu
2023-08-14 16:03             ` Moger, Babu
2023-08-18  7:37               ` Zhao Liu
2023-08-23 17:18                 ` Moger, Babu
2023-09-01  8:43                   ` Zhao Liu
2023-08-01 10:35 ` [PATCH v3 15/17] i386: Fix NumSharingCache for CPUID[0x8000001D].EAX[bits 25:14] Zhao Liu
2023-08-03 20:40   ` Moger, Babu
2023-08-04  9:50     ` Zhao Liu
2023-08-01 10:35 ` [PATCH v3 16/17] i386: Use CPUCacheInfo.share_level to encode " Zhao Liu
2023-08-03 20:44   ` Moger, Babu
2023-08-04  9:56     ` Zhao Liu
2023-08-04 18:50       ` Moger, Babu
2023-08-01 10:35 ` [PATCH v3 17/17] i386: Add new property to control L2 cache topo in CPUID.04H Zhao Liu
2023-08-01 15:35 ` [PATCH v3 00/17] Support smp.clusters for x86 Jonathan Cameron via
2023-08-04 13:17   ` Zhao Liu
2023-08-08 11:52     ` Jonathan Cameron via
2023-08-01 23:11 ` Moger, Babu
2023-08-04  7:44   ` Zhao Liu

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