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[99.254.144.39]) by smtp.gmail.com with ESMTPSA id l24-20020a05620a211800b0076c8fd39407sm806142qkl.113.2023.10.19.08.23.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 19 Oct 2023 08:23:32 -0700 (PDT) Date: Thu, 19 Oct 2023 11:23:31 -0400 From: Peter Xu To: Daniel =?utf-8?B?UC4gQmVycmFuZ8Op?= Cc: Juan Quintela , Yuan Liu , farosas@suse.de, leobras@redhat.com, qemu-devel@nongnu.org, nanhai.zou@intel.com Subject: Re: [PATCH 0/5] Live Migration Acceleration with IAA Compression Message-ID: References: <20231018221224.599065-1-yuan1.liu@intel.com> <87cyxa6dso.fsf@secure.mitica> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: Received-SPF: pass client-ip=170.10.129.124; envelope-from=peterx@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Thu, Oct 19, 2023 at 03:52:14PM +0100, Daniel P. Berrangé wrote: > On Thu, Oct 19, 2023 at 01:40:23PM +0200, Juan Quintela wrote: > > Yuan Liu wrote: > > > Hi, > > > > > > I am writing to submit a code change aimed at enhancing live migration > > > acceleration by leveraging the compression capability of the Intel > > > In-Memory Analytics Accelerator (IAA). > > > > > > Enabling compression functionality during the live migration process can > > > enhance performance, thereby reducing downtime and network bandwidth > > > requirements. However, this improvement comes at the cost of additional > > > CPU resources, posing a challenge for cloud service providers in terms of > > > resource allocation. To address this challenge, I have focused on offloading > > > the compression overhead to the IAA hardware, resulting in performance gains. > > > > > > The implementation of the IAA (de)compression code is based on Intel Query > > > Processing Library (QPL), an open-source software project designed for > > > IAA high-level software programming. > > > > > > Best regards, > > > Yuan Liu > > > > After reviewing the patches: > > > > - why are you doing this on top of old compression code, that is > > obsolete, deprecated and buggy > > > > - why are you not doing it on top of multifd. > > > > You just need to add another compression method on top of multifd. > > See how it was done for zstd: > > I'm not sure that is ideal approach. IIUC, the IAA/QPL library > is not defining a new compression format. Rather it is providing > a hardware accelerator for 'deflate' format, as can be made > compatible with zlib: > > https://intel.github.io/qpl/documentation/dev_guide_docs/c_use_cases/deflate/c_deflate_zlib_gzip.html#zlib-and-gzip-compatibility-reference-link > > With multifd we already have a 'zlib' compression format, and so > this IAA/QPL logic would effectively just be a providing a second > implementation of zlib. > > Given the use of a standard format, I would expect to be able > to use software zlib on the src, mixed with IAA/QPL zlib on > the target, or vica-verca. > > IOW, rather than defining a new compression format for this, > I think we could look at a new migration parameter for > > "compression-accelerator": ["auto", "none", "qpl"] > > with 'auto' the default, such that we can automatically enable > IAA/QPL when 'zlib' format is requested, if running on a suitable > host. I was also curious about the format of compression comparing to software ones when reading. Would there be a use case that one would prefer soft compression even if hardware accelerator existed, no matter on src/dst? I'm wondering whether we can avoid that one more parameter but always use hardware accelerations as long as possible. Thanks, -- Peter Xu