From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id C8CB2C4167D for ; Wed, 8 Nov 2023 07:35:40 +0000 (UTC) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1r0d52-0004L7-4p; Wed, 08 Nov 2023 02:34:28 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1r0d4z-0004KO-Jx; Wed, 08 Nov 2023 02:34:25 -0500 Received: from 60-248-80-70.hinet-ip.hinet.net ([60.248.80.70] helo=Atcsqr.andestech.com) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1r0d4w-0008KY-RG; Wed, 08 Nov 2023 02:34:25 -0500 Received: from mail.andestech.com (ATCPCS16.andestech.com [10.0.1.222]) by Atcsqr.andestech.com with ESMTP id 3A87XvuX035782; Wed, 8 Nov 2023 15:33:57 +0800 (+08) (envelope-from ethan84@andestech.com) Received: from ethan84-VirtualBox (10.0.12.51) by ATCPCS16.andestech.com (10.0.1.222) with Microsoft SMTP Server id 14.3.498.0; Wed, 8 Nov 2023 15:33:55 +0800 Date: Wed, 8 Nov 2023 15:33:32 +0800 To: Peter Maydell CC: Peter Xu , , , , , , , , , , , Subject: Re: [PATCH v2 1/4] exec/memattrs: Add iopmp source id, start address, end address to MemTxAttrs Message-ID: References: <20231102094015.208588-1-ethan84@andestech.com> <20231102094015.208588-2-ethan84@andestech.com> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Disposition: inline In-Reply-To: User-Agent: Mutt/2.1.4 (2021-12-11) X-Originating-IP: [10.0.12.51] X-DNSRBL: X-MAIL: Atcsqr.andestech.com 3A87XvuX035782 Received-SPF: pass client-ip=60.248.80.70; envelope-from=ethan84@andestech.com; helo=Atcsqr.andestech.com X-Spam_score_int: -8 X-Spam_score: -0.9 X-Spam_bar: / X-Spam_report: (-0.9 / 5.0 requ) BAYES_00=-1.9, RDNS_DYNAMIC=0.982, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, TVD_RCVD_IP=0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-to: Ethan Chen From: Ethan Chen via Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Tue, Nov 07, 2023 at 10:53:40AM +0000, Peter Maydell wrote: > On Tue, 7 Nov 2023 at 03:02, Ethan Chen wrote: > > > > On Mon, Nov 06, 2023 at 10:34:41AM +0000, Peter Maydell wrote: > > > What AXI bus signals? You already get address and size in the > > > actual memory transaction, they don't need to go in the MemTxAttrs. > > > > > > > A burst contains multiple continuous read or write operations. In current > > transaction, I can only get the size and address of a single operation. IOPMP > > checks not only a single operation but also the burst information. I propose > > to add those signals to MemTxAttrs. > > QEMU doesn't emulate bus transactions at that level -- we have > no concept of burst transactions. You should have the IOMMU > do whatever it would do for a series of simple transactions. > I propose to use another method like StreamSink in hw/dma/xilinx_axidma.c to let DMA send the signals to IOPMP instead of modifying IOMMU. Thanks, Ethan Chen